Firmware for MFC v6+ variants is not larger than 400 KiB, so there is no need to allocate a full 1 MiB buffer for it. Reduce it to 512 KiB to keep proper alignment of allocated buffer.

Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
Reviewed-by: Javier Martinez Canillas <javier@xxxxxxxxxxxxxxx>
Signed-off-by: memeka <mihailescu2m@gmail.com>
This commit is contained in:
Marek Szyprowski
2017-02-03 15:05:18 +01:00
committed by Mauro (mdrjr) Ribeiro
parent 7866d65955
commit 3b9a20dc3c
3 changed files with 3 additions and 3 deletions

View File

@@ -403,7 +403,7 @@
#define MFC_OTHER_ENC_CTX_BUF_SIZE_V6 (12 * SZ_1K) /* 12KB */
/* MFCv6 variant defines */
#define MAX_FW_SIZE_V6 (SZ_1M) /* 1MB */
#define MAX_FW_SIZE_V6 (SZ_512K) /* 512KB */
#define MAX_CPB_SIZE_V6 (3 * SZ_1M) /* 3MB */
#define MFC_VERSION_V6 0x61
#define MFC_NUM_PORTS_V6 1

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@@ -34,7 +34,7 @@
#define S5P_FIMV_E_VP8_NUM_T_LAYER_V7 0xfdc4
/* MFCv7 variant defines */
#define MAX_FW_SIZE_V7 (SZ_1M) /* 1MB */
#define MAX_FW_SIZE_V7 (SZ_512K) /* 512KB */
#define MAX_CPB_SIZE_V7 (3 * SZ_1M) /* 3MB */
#define MFC_VERSION_V7 0x72
#define MFC_NUM_PORTS_V7 1

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@@ -116,7 +116,7 @@
#define S5P_FIMV_D_ALIGN_PLANE_SIZE_V8 64
/* MFCv8 variant defines */
#define MAX_FW_SIZE_V8 (SZ_1M) /* 1MB */
#define MAX_FW_SIZE_V8 (SZ_512K) /* 512KB */
#define MAX_CPB_SIZE_V8 (3 * SZ_1M) /* 3MB */
#define MFC_VERSION_V8 0x80
#define MFC_NUM_PORTS_V8 1