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clk: rockchip: rk3528: Remove crypto clock

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They are moved to scmi clock.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I093a0f964c525efdf3a78fe5070c1860edac5a3c
This commit is contained in:
Joseph Chen
2022-12-29 07:29:31 +00:00
parent df5b684fe9
commit 3ca63279a0
1 changed files with 0 additions and 11 deletions
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11
drivers/clk/rockchip/clk-rk3528.c
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@@ -420,8 +420,6 @@ static struct rockchip_clk_branch rk3528_clk_branches[] __initdata = {
GATE(ACLK_GIC, "aclk_gic", "aclk_bus_m_root", CLK_IS_CRITICAL,
RK3528_CLKGATE_CON(9), 1, GFLAGS),
GATE(ACLK_CRYPTO, "aclk_crypto", "aclk_bus_m_root", 0,
RK3528_CLKGATE_CON(10), 11, GFLAGS),
COMPOSITE_NODIV(ACLK_BUS_ROOT, "aclk_bus_root", mux_200m_100m_24m_p, CLK_IS_CRITICAL,
RK3528_CLKSEL_CON(43), 6, 2, MFLAGS,
RK3528_CLKGATE_CON(8), 4, GFLAGS),
@@ -446,9 +444,6 @@ static struct rockchip_clk_branch rk3528_clk_branches[] __initdata = {
GATE(HCLK_TRNG_NS, "hclk_trng_ns", "hclk_bus_root", 0,
RK3528_CLKGATE_CON(10), 3, GFLAGS),
GATE(HCLK_CRYPTO, "hclk_crypto", "hclk_bus_root", 0,
RK3528_CLKGATE_CON(10), 12, GFLAGS),
COMPOSITE_NODIV(PCLK_BUS_ROOT, "pclk_bus_root", mux_100m_50m_24m_p, CLK_IS_CRITICAL,
RK3528_CLKSEL_CON(43), 10, 2, MFLAGS,
RK3528_CLKGATE_CON(8), 6, GFLAGS),
@@ -475,12 +470,6 @@ static struct rockchip_clk_branch rk3528_clk_branches[] __initdata = {
GATE(PCLK_INTMUX, "pclk_intmux", "pclk_bus_root", CLK_IGNORE_UNUSED,
RK3528_CLKGATE_CON(11), 12, GFLAGS),
COMPOSITE_NODIV(CLK_PKA_CRYPTO, "clk_pka_crypto", mux_300m_200m_100m_24m_p, 0,
RK3528_CLKSEL_CON(44), 0, 2, MFLAGS,
RK3528_CLKGATE_CON(10), 10, GFLAGS),
COMPOSITE_NODIV(CLK_CORE_CRYPTO, "clk_core_crypto", mux_300m_200m_100m_24m_p, 0,
RK3528_CLKSEL_CON(43), 14, 2, MFLAGS,
RK3528_CLKGATE_CON(10), 9, GFLAGS),
COMPOSITE_NODIV(CLK_PWM0, "clk_pwm0", mux_100m_50m_24m_p, 0,
RK3528_CLKSEL_CON(44), 6, 2, MFLAGS,
RK3528_CLKGATE_CON(11), 5, GFLAGS),