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event: restore watch point after cpu pm event [1/1]
PD#TV-9668 Problem: After cpu idle enabled, watch point event register will be cleared if cpu exit pm(idle). This will cause watch point can't work. Solution: re-enable watch point after cpu exit pm(idle) Verify: TL1 Change-Id: I4fc2002eaabecd4c5e60a5916bc29e0107882bec Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
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@@ -52,6 +52,10 @@ static inline void decode_ctrl_reg(u32 reg,
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#define ARM_DEBUG_ARCH_V7_MM 4
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#define ARM_DEBUG_ARCH_V7_1 5
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#define ARM_DEBUG_ARCH_V8 6
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#ifdef CONFIG_AMLOGIC_MODIFY
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/* for cortex-a55 */
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#define ARM_DEBUG_ARCH_V8_1 8
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#endif
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/* Breakpoint */
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#define ARM_BREAKPOINT_EXECUTE 0
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@@ -261,6 +261,9 @@ static int enable_monitor_mode(void)
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case ARM_DEBUG_ARCH_V7_ECP14:
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case ARM_DEBUG_ARCH_V7_1:
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case ARM_DEBUG_ARCH_V8:
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#ifdef CONFIG_AMLOGIC_MODIFY
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case ARM_DEBUG_ARCH_V8_1:
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#endif
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ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
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isb();
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break;
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@@ -1041,8 +1044,26 @@ static struct notifier_block dbg_reset_nb = {
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static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action,
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void *v)
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{
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#ifdef CONFIG_AMLOGIC_MODIFY
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struct perf_event *wp, **slots;
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int i;
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if (action == CPU_PM_EXIT) {
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reset_ctrl_regs(NULL);
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/* reinstall already installed wp after exit pm */
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slots = this_cpu_ptr(wp_on_reg);
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for (i = 0; i < core_num_wrps; ++i) {
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wp = slots[i];
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if (wp) {
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slots[i] = NULL;
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arch_install_hw_breakpoint(wp);
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}
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}
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}
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#else
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if (action == CPU_PM_EXIT)
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reset_ctrl_regs(NULL);
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#endif
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return NOTIFY_OK;
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}
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