shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-01 08:46:36 +09:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'next/cleanup-s3c' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup

Browse Source 
From Kukjin Kim <kgene.kim@samsung.com>:

Cleanups for the Samsung S3C24XX platforms.

* 'next/cleanup-s3c' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S3C24XX: cleanup the included soc init functions in common.h
  ARM: S3C24XX: move plat-samsung/s3c24XX headers to local common.h
  ARM: S3C24XX: remove plat/irq.h in plat-samsung
  ARM: S3C24XX: plat/common-smdk.h local
  mmc: s3cmci: moved mach/regs-sdi.h into s3cmci device driver

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2013-03-15 22:39:46 +01:00
parent f6161aa153 7488335dcf
commit 3cdb59d73e
42 changed files with 194 additions and 480 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-s3c24xx/bast-irq.c
View File

@@ -34,8 +34,6 @@
#include <mach/hardware.h>
#include <mach/regs-irq.h>
#include <plat/irq.h>
#include "bast.h"
#define irqdbf(x...)

1
arch/arm/mach-s3c24xx/clock-s3c2410.c
View File

@@ -40,7 +40,6 @@
#include <mach/regs-clock.h>
#include <mach/regs-gpio.h>
#include <plat/s3c2410.h>
#include <plat/clock.h>
#include <plat/cpu.h>

1
arch/arm/mach-s3c24xx/clock-s3c2412.c
View File

@@ -41,7 +41,6 @@
#include <mach/regs-clock.h>
#include <mach/regs-gpio.h>
#include <plat/s3c2412.h>
#include <plat/clock.h>
#include <plat/cpu.h>

1
arch/arm/mach-s3c24xx/clock-s3c2416.c
View File

@@ -14,7 +14,6 @@
#include <linux/init.h>
#include <linux/clk.h>
#include <plat/s3c2416.h>
#include <plat/clock.h>
#include <plat/clock-clksrc.h>
#include <plat/cpu.h>

1
arch/arm/mach-s3c24xx/clock-s3c2443.c
View File

@@ -41,7 +41,6 @@
#include <plat/cpu-freq.h>
#include <plat/s3c2443.h>
#include <plat/clock.h>
#include <plat/clock-clksrc.h>
#include <plat/cpu.h>

3
arch/arm/mach-s3c24xx/common-smdk.c
View File

@@ -41,11 +41,12 @@
#include <linux/platform_data/mtd-nand-s3c2410.h>
#include <plat/common-smdk.h>
#include <plat/gpio-cfg.h>
#include <plat/devs.h>
#include <plat/pm.h>
#include "common-smdk.h"
/* LED devices */
static struct s3c24xx_led_platdata smdk_pdata_led4 = {

3
arch/arm/plat-samsung/include/plat/common-smdk.h → arch/arm/mach-s3c24xx/common-smdk.h
View File

@@ -1,5 +1,4 @@
/* linux/arch/arm/plat-samsung/include/plat/common-smdk.h
*
/*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*

7
arch/arm/mach-s3c24xx/common.c
View File

@@ -47,14 +47,11 @@
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/clock.h>
#include <plat/s3c2410.h>
#include <plat/s3c2412.h>
#include <plat/s3c2416.h>
#include <plat/s3c244x.h>
#include <plat/s3c2443.h>
#include <plat/cpu-freq.h>
#include <plat/pll.h>
#include "common.h"
/* table of supported CPUs */
static const char name_s3c2410[] = "S3C2410";

90
arch/arm/mach-s3c24xx/common.h
View File

@@ -12,8 +12,94 @@
#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
void s3c2410_restart(char mode, const char *cmd);
void s3c244x_restart(char mode, const char *cmd);
struct s3c2410_uartcfg;
#ifdef CONFIG_CPU_S3C2410
extern int s3c2410_init(void);
extern int s3c2410a_init(void);
extern void s3c2410_map_io(void);
extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2410_init_clocks(int xtal);
extern void s3c2410_restart(char mode, const char *cmd);
#else
#define s3c2410_init_clocks NULL
#define s3c2410_init_uarts NULL
#define s3c2410_map_io NULL
#define s3c2410_init NULL
#define s3c2410a_init NULL
#endif
#ifdef CONFIG_CPU_S3C2412
extern int s3c2412_init(void);
extern void s3c2412_map_io(void);
extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2412_init_clocks(int xtal);
extern int s3c2412_baseclk_add(void);
extern void s3c2412_restart(char mode, const char *cmd);
#else
#define s3c2412_init_clocks NULL
#define s3c2412_init_uarts NULL
#define s3c2412_map_io NULL
#define s3c2412_init NULL
#endif
#ifdef CONFIG_CPU_S3C2416
extern int s3c2416_init(void);
extern void s3c2416_map_io(void);
extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2416_init_clocks(int xtal);
extern int s3c2416_baseclk_add(void);
extern void s3c2416_restart(char mode, const char *cmd);
extern void s3c2416_init_irq(void);
extern struct syscore_ops s3c2416_irq_syscore_ops;
#else
#define s3c2416_init_clocks NULL
#define s3c2416_init_uarts NULL
#define s3c2416_map_io NULL
#define s3c2416_init NULL
#endif
#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
extern void s3c244x_map_io(void);
extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c244x_init_clocks(int xtal);
extern void s3c244x_restart(char mode, const char *cmd);
#else
#define s3c244x_init_clocks NULL
#define s3c244x_init_uarts NULL
#endif
#ifdef CONFIG_CPU_S3C2440
extern int s3c2440_init(void);
extern void s3c2440_map_io(void);
#else
#define s3c2440_init NULL
#define s3c2440_map_io NULL
#endif
#ifdef CONFIG_CPU_S3C2442
extern int s3c2442_init(void);
extern void s3c2442_map_io(void);
#else
#define s3c2442_init NULL
#define s3c2442_map_io NULL
#endif
#ifdef CONFIG_CPU_S3C2443
extern int s3c2443_init(void);
extern void s3c2443_map_io(void);
extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2443_init_clocks(int xtal);
extern int s3c2443_baseclk_add(void);
extern void s3c2443_restart(char mode, const char *cmd);
extern void s3c2443_init_irq(void);
#else
#define s3c2443_init_clocks NULL
#define s3c2443_init_uarts NULL
#define s3c2443_map_io NULL
#define s3c2443_init NULL
#endif
extern struct syscore_ops s3c24xx_irq_syscore_ops;

1
arch/arm/mach-s3c24xx/dma-s3c2410.c
View File

@@ -28,7 +28,6 @@
#include <plat/regs-ac97.h>
#include <plat/regs-dma.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
#include <plat/regs-iis.h>
#include <plat/regs-spi.h>

1
arch/arm/mach-s3c24xx/dma-s3c2412.c
View File

@@ -28,7 +28,6 @@
#include <plat/regs-ac97.h>
#include <plat/regs-dma.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
#include <plat/regs-iis.h>
#include <plat/regs-spi.h>

1
arch/arm/mach-s3c24xx/dma-s3c2440.c
View File

@@ -28,7 +28,6 @@
#include <plat/regs-ac97.h>
#include <plat/regs-dma.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
#include <plat/regs-iis.h>
#include <plat/regs-spi.h>

1
arch/arm/mach-s3c24xx/dma-s3c2443.c
View File

@@ -28,7 +28,6 @@
#include <plat/regs-ac97.h>
#include <plat/regs-dma.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
#include <plat/regs-iis.h>
#include <plat/regs-spi.h>

127
arch/arm/mach-s3c24xx/include/mach/regs-sdi.h
View File

@@ -1,127 +0,0 @@
/* arch/arm/mach-s3c2410/include/mach/regs-sdi.h
*
* Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* S3C2410 MMC/SDIO register definitions
*/
#ifndef __ASM_ARM_REGS_SDI
#define __ASM_ARM_REGS_SDI "regs-sdi.h"
#define S3C2410_SDICON (0x00)
#define S3C2410_SDIPRE (0x04)
#define S3C2410_SDICMDARG (0x08)
#define S3C2410_SDICMDCON (0x0C)
#define S3C2410_SDICMDSTAT (0x10)
#define S3C2410_SDIRSP0 (0x14)
#define S3C2410_SDIRSP1 (0x18)
#define S3C2410_SDIRSP2 (0x1C)
#define S3C2410_SDIRSP3 (0x20)
#define S3C2410_SDITIMER (0x24)
#define S3C2410_SDIBSIZE (0x28)
#define S3C2410_SDIDCON (0x2C)
#define S3C2410_SDIDCNT (0x30)
#define S3C2410_SDIDSTA (0x34)
#define S3C2410_SDIFSTA (0x38)
#define S3C2410_SDIDATA (0x3C)
#define S3C2410_SDIIMSK (0x40)
#define S3C2440_SDIDATA (0x40)
#define S3C2440_SDIIMSK (0x3C)
#define S3C2440_SDICON_SDRESET (1<<8)
#define S3C2440_SDICON_MMCCLOCK (1<<5)
#define S3C2410_SDICON_BYTEORDER (1<<4)
#define S3C2410_SDICON_SDIOIRQ (1<<3)
#define S3C2410_SDICON_RWAITEN (1<<2)
#define S3C2410_SDICON_FIFORESET (1<<1)
#define S3C2410_SDICON_CLOCKTYPE (1<<0)
#define S3C2410_SDICMDCON_ABORT (1<<12)
#define S3C2410_SDICMDCON_WITHDATA (1<<11)
#define S3C2410_SDICMDCON_LONGRSP (1<<10)
#define S3C2410_SDICMDCON_WAITRSP (1<<9)
#define S3C2410_SDICMDCON_CMDSTART (1<<8)
#define S3C2410_SDICMDCON_SENDERHOST (1<<6)
#define S3C2410_SDICMDCON_INDEX (0x3f)
#define S3C2410_SDICMDSTAT_CRCFAIL (1<<12)
#define S3C2410_SDICMDSTAT_CMDSENT (1<<11)
#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1<<10)
#define S3C2410_SDICMDSTAT_RSPFIN (1<<9)
#define S3C2410_SDICMDSTAT_XFERING (1<<8)
#define S3C2410_SDICMDSTAT_INDEX (0xff)
#define S3C2440_SDIDCON_DS_BYTE (0<<22)
#define S3C2440_SDIDCON_DS_HALFWORD (1<<22)
#define S3C2440_SDIDCON_DS_WORD (2<<22)
#define S3C2410_SDIDCON_IRQPERIOD (1<<21)
#define S3C2410_SDIDCON_TXAFTERRESP (1<<20)
#define S3C2410_SDIDCON_RXAFTERCMD (1<<19)
#define S3C2410_SDIDCON_BUSYAFTERCMD (1<<18)
#define S3C2410_SDIDCON_BLOCKMODE (1<<17)
#define S3C2410_SDIDCON_WIDEBUS (1<<16)
#define S3C2410_SDIDCON_DMAEN (1<<15)
#define S3C2410_SDIDCON_STOP (1<<14)
#define S3C2440_SDIDCON_DATSTART (1<<14)
#define S3C2410_SDIDCON_DATMODE (3<<12)
#define S3C2410_SDIDCON_BLKNUM (0x7ff)
/* constants for S3C2410_SDIDCON_DATMODE */
#define S3C2410_SDIDCON_XFER_READY (0<<12)
#define S3C2410_SDIDCON_XFER_CHKSTART (1<<12)
#define S3C2410_SDIDCON_XFER_RXSTART (2<<12)
#define S3C2410_SDIDCON_XFER_TXSTART (3<<12)
#define S3C2410_SDIDCON_BLKNUM_MASK (0xFFF)
#define S3C2410_SDIDCNT_BLKNUM_SHIFT (12)
#define S3C2410_SDIDSTA_RDYWAITREQ (1<<10)
#define S3C2410_SDIDSTA_SDIOIRQDETECT (1<<9)
#define S3C2410_SDIDSTA_FIFOFAIL (1<<8) /* reserved on 2440 */
#define S3C2410_SDIDSTA_CRCFAIL (1<<7)
#define S3C2410_SDIDSTA_RXCRCFAIL (1<<6)
#define S3C2410_SDIDSTA_DATATIMEOUT (1<<5)
#define S3C2410_SDIDSTA_XFERFINISH (1<<4)
#define S3C2410_SDIDSTA_BUSYFINISH (1<<3)
#define S3C2410_SDIDSTA_SBITERR (1<<2) /* reserved on 2410a/2440 */
#define S3C2410_SDIDSTA_TXDATAON (1<<1)
#define S3C2410_SDIDSTA_RXDATAON (1<<0)
#define S3C2440_SDIFSTA_FIFORESET (1<<16)
#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */
#define S3C2410_SDIFSTA_TFDET (1<<13)
#define S3C2410_SDIFSTA_RFDET (1<<12)
#define S3C2410_SDIFSTA_TFHALF (1<<11)
#define S3C2410_SDIFSTA_TFEMPTY (1<<10)
#define S3C2410_SDIFSTA_RFLAST (1<<9)
#define S3C2410_SDIFSTA_RFFULL (1<<8)
#define S3C2410_SDIFSTA_RFHALF (1<<7)
#define S3C2410_SDIFSTA_COUNTMASK (0x7f)
#define S3C2410_SDIIMSK_RESPONSECRC (1<<17)
#define S3C2410_SDIIMSK_CMDSENT (1<<16)
#define S3C2410_SDIIMSK_CMDTIMEOUT (1<<15)
#define S3C2410_SDIIMSK_RESPONSEND (1<<14)
#define S3C2410_SDIIMSK_READWAIT (1<<13)
#define S3C2410_SDIIMSK_SDIOIRQ (1<<12)
#define S3C2410_SDIIMSK_FIFOFAIL (1<<11)
#define S3C2410_SDIIMSK_CRCSTATUS (1<<10)
#define S3C2410_SDIIMSK_DATACRC (1<<9)
#define S3C2410_SDIIMSK_DATATIMEOUT (1<<8)
#define S3C2410_SDIIMSK_DATAFINISH (1<<7)
#define S3C2410_SDIIMSK_BUSYFINISH (1<<6)
#define S3C2410_SDIIMSK_SBITERR (1<<5) /* reserved 2440/2410a */
#define S3C2410_SDIIMSK_TXFIFOHALF (1<<4)
#define S3C2410_SDIIMSK_TXFIFOEMPTY (1<<3)
#define S3C2410_SDIIMSK_RXFIFOLAST (1<<2)
#define S3C2410_SDIIMSK_RXFIFOFULL (1<<1)
#define S3C2410_SDIIMSK_RXFIFOHALF (1<<0)
#endif /* __ASM_ARM_REGS_SDI */

7
arch/arm/mach-s3c24xx/irq-pm.c
View File

@@ -16,10 +16,15 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/syscore_ops.h>
#include <linux/io.h>
#include <plat/cpu.h>
#include <plat/pm.h>
#include <plat/irq.h>
#include <plat/map-base.h>
#include <plat/map-s3c.h>
#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>
#include <asm/irq.h>

8
arch/arm/mach-s3c24xx/irq.c
View File

@@ -34,7 +34,6 @@
#include <plat/cpu.h>
#include <plat/regs-irqtype.h>
#include <plat/pm.h>
#include <plat/irq.h>
#define S3C_IRQTYPE_NONE 0
#define S3C_IRQTYPE_EINT 1
@@ -175,8 +174,7 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg,
return 0;
}
/* FIXME: make static when it's out of plat-samsung/irq.h */
int s3c_irqext_type(struct irq_data *data, unsigned int type)
static int s3c_irqext_type(struct irq_data *data, unsigned int type)
{
void __iomem *extint_reg;
void __iomem *gpcon_reg;
@@ -224,7 +222,7 @@ static int s3c_irqext0_type(struct irq_data *data, unsigned int type)
extint_offset, type);
}
struct irq_chip s3c_irq_chip = {
static struct irq_chip s3c_irq_chip = {
.name = "s3c",
.irq_ack = s3c_irq_ack,
.irq_mask = s3c_irq_mask,
@@ -232,7 +230,7 @@ struct irq_chip s3c_irq_chip = {
.irq_set_wake = s3c_irq_wake
};
struct irq_chip s3c_irq_level_chip = {
static struct irq_chip s3c_irq_level_chip = {
.name = "s3c-level",
.irq_mask = s3c_irq_mask,
.irq_unmask = s3c_irq_unmask,

2
arch/arm/mach-s3c24xx/mach-jive.c
View File

@@ -46,7 +46,6 @@
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include <plat/s3c2412.h>
#include <plat/gpio-cfg.h>
#include <plat/clock.h>
#include <plat/devs.h>
@@ -54,6 +53,7 @@
#include <plat/pm.h>
#include <linux/platform_data/usb-s3c2410_udc.h>
#include "common.h"
#include "s3c2412-power.h"
static struct map_desc jive_iodesc[] __initdata = {

1
arch/arm/mach-s3c24xx/mach-n30.c
View File

@@ -48,7 +48,6 @@
#include <plat/cpu.h>
#include <plat/devs.h>
#include <linux/platform_data/mmc-s3cmci.h>
#include <plat/s3c2410.h>
#include <linux/platform_data/usb-s3c2410_udc.h>
#include "common.h"

2
arch/arm/mach-s3c24xx/mach-nexcoder.c
View File

@@ -41,8 +41,6 @@
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/gpio-cfg.h>
#include <plat/s3c2410.h>
#include <plat/s3c244x.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>

1
arch/arm/mach-s3c24xx/mach-otom.c
View File

@@ -33,7 +33,6 @@
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/regs-serial.h>
#include <plat/s3c2410.h>
#include "common.h"
#include "otom.h"

2
arch/arm/mach-s3c24xx/mach-qt2410.c
View File

@@ -55,13 +55,13 @@
#include <linux/platform_data/usb-s3c2410_udc.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/common-smdk.h>
#include <plat/gpio-cfg.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/pm.h>
#include "common.h"
#include "common-smdk.h"
static struct map_desc qt2410_iodesc[] __initdata = {
{ 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }

3
arch/arm/mach-s3c24xx/mach-smdk2410.c
View File

@@ -52,9 +52,8 @@
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/common-smdk.h>
#include "common.h"
#include "common-smdk.h"
static struct map_desc smdk2410_iodesc[] __initdata = {
/* nothing here yet */

5
arch/arm/mach-s3c24xx/mach-smdk2413.c
View File

@@ -41,13 +41,12 @@
#include <linux/platform_data/i2c-s3c2410.h>
#include <mach/fb.h>
#include <plat/s3c2410.h>
#include <plat/s3c2412.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/common-smdk.h>
#include "common.h"
#include "common-smdk.h"
static struct map_desc smdk2413_iodesc[] __initdata = {
};

4
arch/arm/mach-s3c24xx/mach-smdk2416.c
View File

@@ -42,7 +42,6 @@
#include <linux/platform_data/leds-s3c24xx.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/s3c2416.h>
#include <plat/gpio-cfg.h>
#include <plat/clock.h>
#include <plat/devs.h>
@@ -54,7 +53,8 @@
#include <plat/fb.h>
#include <plat/common-smdk.h>
#include "common.h"
#include "common-smdk.h"
static struct map_desc smdk2416_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */

5
arch/arm/mach-s3c24xx/mach-smdk2440.c
View File

@@ -38,15 +38,12 @@
#include <mach/fb.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/s3c2410.h>
#include <plat/s3c244x.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/common-smdk.h>
#include "common.h"
#include "common-smdk.h"
static struct map_desc smdk2440_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */

5
arch/arm/mach-s3c24xx/mach-smdk2443.c
View File

@@ -38,13 +38,12 @@
#include <mach/fb.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/s3c2410.h>
#include <plat/s3c2443.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/common-smdk.h>
#include "common.h"
#include "common-smdk.h"
static struct map_desc smdk2443_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */

3
arch/arm/mach-s3c24xx/mach-vstms.c
View File

@@ -41,12 +41,11 @@
#include <linux/platform_data/i2c-s3c2410.h>
#include <linux/platform_data/mtd-nand-s3c2410.h>
#include <plat/s3c2410.h>
#include <plat/s3c2412.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include "common.h"
static struct map_desc vstms_iodesc[] __initdata = {
};

1
arch/arm/mach-s3c24xx/pm-s3c2412.c
View File

@@ -29,7 +29,6 @@
#include <plat/cpu.h>
#include <plat/pm.h>
#include <plat/s3c2412.h>
#include "regs-dsc.h"
#include "s3c2412-power.h"

1
arch/arm/mach-s3c24xx/s3c2410.c
View File

@@ -37,7 +37,6 @@
#include <mach/regs-clock.h>
#include <plat/regs-serial.h>
#include <plat/s3c2410.h>
#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/clock.h>

1
arch/arm/mach-s3c24xx/s3c2412.c
View File

@@ -44,7 +44,6 @@
#include <plat/pm.h>
#include <plat/regs-serial.h>
#include <plat/regs-spi.h>
#include <plat/s3c2412.h>
#include "common.h"
#include "regs-dsc.h"

1
arch/arm/mach-s3c24xx/s3c2416.c
View File

@@ -50,7 +50,6 @@
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
#include <plat/s3c2416.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/sdhci.h>

1
arch/arm/mach-s3c24xx/s3c2440.c
View File

@@ -33,7 +33,6 @@
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/s3c244x.h>
#include <plat/pm.h>
#include <plat/gpio-core.h>

1
arch/arm/mach-s3c24xx/s3c2442.c
View File

@@ -44,7 +44,6 @@
#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/s3c244x.h>
#include <plat/pm.h>
#include <plat/gpio-core.h>

1
arch/arm/mach-s3c24xx/s3c2443.c
View File

@@ -36,7 +36,6 @@
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
#include <plat/s3c2443.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/fb-core.h>

2
arch/arm/mach-s3c24xx/s3c244x.c
View File

@@ -37,8 +37,6 @@
#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
#include <plat/s3c2410.h>
#include <plat/s3c244x.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>

116
arch/arm/plat-samsung/include/plat/irq.h
View File

@@ -1,116 +0,0 @@
/* linux/arch/arm/plat-samsung/include/plat/irq.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for S3C24XX CPU IRQ support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>
#define irqdbf(x...)
#define irqdbf2(x...)
#define EXTINT_OFF (IRQ_EINT4 - 4)
/* these are exported for arch/arm/mach-* usage */
extern struct irq_chip s3c_irq_level_chip;
extern struct irq_chip s3c_irq_chip;
static inline void s3c_irqsub_mask(unsigned int irqno,
unsigned int parentbit,
int subcheck)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
/* check to see if we need to mask the parent IRQ */
if ((submask & subcheck) == subcheck)
__raw_writel(mask | parentbit, S3C2410_INTMSK);
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
}
static inline void s3c_irqsub_unmask(unsigned int irqno,
unsigned int parentbit)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
mask &= ~parentbit;
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
__raw_writel(mask, S3C2410_INTMSK);
}
static inline void s3c_irqsub_maskack(unsigned int irqno,
unsigned int parentmask,
unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
s3c_irqsub_mask(irqno, parentmask, group);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
static inline void s3c_irqsub_ack(unsigned int irqno,
unsigned int parentmask,
unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
/* exported for use in arch/arm/mach-s3c2410 */
#ifdef CONFIG_PM
extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
#else
#define s3c_irq_wake NULL
#endif
extern int s3c_irqext_type(struct irq_data *d, unsigned int type);

31
arch/arm/plat-samsung/include/plat/s3c2410.h
View File

@@ -1,31 +0,0 @@
/* linux/arch/arm/plat-samsung/include/plat/s3c2410.h
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for s3c2410 machine directory
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifdef CONFIG_CPU_S3C2410
extern int s3c2410_init(void);
extern int s3c2410a_init(void);
extern void s3c2410_map_io(void);
extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2410_init_clocks(int xtal);
#else
#define s3c2410_init_clocks NULL
#define s3c2410_init_uarts NULL
#define s3c2410_map_io NULL
#define s3c2410_init NULL
#define s3c2410a_init NULL
#endif

32
arch/arm/plat-samsung/include/plat/s3c2412.h
View File

@@ -1,32 +0,0 @@
/* linux/arch/arm/plat-samsung/include/plat/s3c2412.h
*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for s3c2412 cpu support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifdef CONFIG_CPU_S3C2412
extern int s3c2412_init(void);
extern void s3c2412_map_io(void);
extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2412_init_clocks(int xtal);
extern int s3c2412_baseclk_add(void);
extern void s3c2412_restart(char mode, const char *cmd);
#else
#define s3c2412_init_clocks NULL
#define s3c2412_init_uarts NULL
#define s3c2412_map_io NULL
#define s3c2412_init NULL
#define s3c2412_restart NULL
#endif

37
arch/arm/plat-samsung/include/plat/s3c2416.h
View File

@@ -1,37 +0,0 @@
/* linux/arch/arm/plat-samsung/include/plat/s3c2416.h
*
* Copyright (c) 2009 Yauhen Kharuzhy <jekhor@gmail.com>
*
* Header file for s3c2416 cpu support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifdef CONFIG_CPU_S3C2416
struct s3c2410_uartcfg;
extern int s3c2416_init(void);
extern void s3c2416_map_io(void);
extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2416_init_clocks(int xtal);
extern int s3c2416_baseclk_add(void);
extern void s3c2416_restart(char mode, const char *cmd);
extern void s3c2416_init_irq(void);
extern struct syscore_ops s3c2416_irq_syscore_ops;
#else
#define s3c2416_init_clocks NULL
#define s3c2416_init_uarts NULL
#define s3c2416_map_io NULL
#define s3c2416_init NULL
#define s3c2416_restart NULL
#endif

36
arch/arm/plat-samsung/include/plat/s3c2443.h
View File

@@ -1,36 +0,0 @@
/* linux/arch/arm/plat-samsung/include/plat/s3c2443.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for s3c2443 cpu support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifdef CONFIG_CPU_S3C2443
struct s3c2410_uartcfg;
extern int s3c2443_init(void);
extern void s3c2443_map_io(void);
extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2443_init_clocks(int xtal);
extern int s3c2443_baseclk_add(void);
extern void s3c2443_restart(char mode, const char *cmd);
extern void s3c2443_init_irq(void);
#else
#define s3c2443_init_clocks NULL
#define s3c2443_init_uarts NULL
#define s3c2443_map_io NULL
#define s3c2443_init NULL
#define s3c2443_restart NULL
#endif

42
arch/arm/plat-samsung/include/plat/s3c244x.h
View File

@@ -1,42 +0,0 @@
/* linux/arch/arm/plat-samsung/include/plat/s3c244x.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for S3C2440 and S3C2442 cpu support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
extern void s3c244x_map_io(void);
extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c244x_init_clocks(int xtal);
#else
#define s3c244x_init_clocks NULL
#define s3c244x_init_uarts NULL
#endif
#ifdef CONFIG_CPU_S3C2440
extern int s3c2440_init(void);
extern void s3c2440_map_io(void);
#else
#define s3c2440_init NULL
#define s3c2440_map_io NULL
#endif
#ifdef CONFIG_CPU_S3C2442
extern int s3c2442_init(void);
extern void s3c2442_map_io(void);
#else
#define s3c2442_init NULL
#define s3c2442_map_io NULL
#endif

83
drivers/mmc/host/s3cmci.c
View File

@@ -25,14 +25,93 @@
#include <mach/dma.h>
#include <mach/regs-sdi.h>
#include <linux/platform_data/mmc-s3cmci.h>
#include "s3cmci.h"
#define DRIVER_NAME "s3c-mci"
#define S3C2410_SDICON (0x00)
#define S3C2410_SDIPRE (0x04)
#define S3C2410_SDICMDARG (0x08)
#define S3C2410_SDICMDCON (0x0C)
#define S3C2410_SDICMDSTAT (0x10)
#define S3C2410_SDIRSP0 (0x14)
#define S3C2410_SDIRSP1 (0x18)
#define S3C2410_SDIRSP2 (0x1C)
#define S3C2410_SDIRSP3 (0x20)
#define S3C2410_SDITIMER (0x24)
#define S3C2410_SDIBSIZE (0x28)
#define S3C2410_SDIDCON (0x2C)
#define S3C2410_SDIDCNT (0x30)
#define S3C2410_SDIDSTA (0x34)
#define S3C2410_SDIFSTA (0x38)
#define S3C2410_SDIDATA (0x3C)
#define S3C2410_SDIIMSK (0x40)
#define S3C2440_SDIDATA (0x40)
#define S3C2440_SDIIMSK (0x3C)
#define S3C2440_SDICON_SDRESET (1 << 8)
#define S3C2410_SDICON_SDIOIRQ (1 << 3)
#define S3C2410_SDICON_FIFORESET (1 << 1)
#define S3C2410_SDICON_CLOCKTYPE (1 << 0)
#define S3C2410_SDICMDCON_LONGRSP (1 << 10)
#define S3C2410_SDICMDCON_WAITRSP (1 << 9)
#define S3C2410_SDICMDCON_CMDSTART (1 << 8)
#define S3C2410_SDICMDCON_SENDERHOST (1 << 6)
#define S3C2410_SDICMDCON_INDEX (0x3f)
#define S3C2410_SDICMDSTAT_CRCFAIL (1 << 12)
#define S3C2410_SDICMDSTAT_CMDSENT (1 << 11)
#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1 << 10)
#define S3C2410_SDICMDSTAT_RSPFIN (1 << 9)
#define S3C2440_SDIDCON_DS_WORD (2 << 22)
#define S3C2410_SDIDCON_TXAFTERRESP (1 << 20)
#define S3C2410_SDIDCON_RXAFTERCMD (1 << 19)
#define S3C2410_SDIDCON_BLOCKMODE (1 << 17)
#define S3C2410_SDIDCON_WIDEBUS (1 << 16)
#define S3C2410_SDIDCON_DMAEN (1 << 15)
#define S3C2410_SDIDCON_STOP (1 << 14)
#define S3C2440_SDIDCON_DATSTART (1 << 14)
#define S3C2410_SDIDCON_XFER_RXSTART (2 << 12)
#define S3C2410_SDIDCON_XFER_TXSTART (3 << 12)
#define S3C2410_SDIDCON_BLKNUM_MASK (0xFFF)
#define S3C2410_SDIDSTA_SDIOIRQDETECT (1 << 9)
#define S3C2410_SDIDSTA_FIFOFAIL (1 << 8)
#define S3C2410_SDIDSTA_CRCFAIL (1 << 7)
#define S3C2410_SDIDSTA_RXCRCFAIL (1 << 6)
#define S3C2410_SDIDSTA_DATATIMEOUT (1 << 5)
#define S3C2410_SDIDSTA_XFERFINISH (1 << 4)
#define S3C2410_SDIDSTA_TXDATAON (1 << 1)
#define S3C2410_SDIDSTA_RXDATAON (1 << 0)
#define S3C2440_SDIFSTA_FIFORESET (1 << 16)
#define S3C2440_SDIFSTA_FIFOFAIL (3 << 14)
#define S3C2410_SDIFSTA_TFDET (1 << 13)
#define S3C2410_SDIFSTA_RFDET (1 << 12)
#define S3C2410_SDIFSTA_COUNTMASK (0x7f)
#define S3C2410_SDIIMSK_RESPONSECRC (1 << 17)
#define S3C2410_SDIIMSK_CMDSENT (1 << 16)
#define S3C2410_SDIIMSK_CMDTIMEOUT (1 << 15)
#define S3C2410_SDIIMSK_RESPONSEND (1 << 14)
#define S3C2410_SDIIMSK_SDIOIRQ (1 << 12)
#define S3C2410_SDIIMSK_FIFOFAIL (1 << 11)
#define S3C2410_SDIIMSK_CRCSTATUS (1 << 10)
#define S3C2410_SDIIMSK_DATACRC (1 << 9)
#define S3C2410_SDIIMSK_DATATIMEOUT (1 << 8)
#define S3C2410_SDIIMSK_DATAFINISH (1 << 7)
#define S3C2410_SDIIMSK_TXFIFOHALF (1 << 4)
#define S3C2410_SDIIMSK_RXFIFOLAST (1 << 2)
#define S3C2410_SDIIMSK_RXFIFOHALF (1 << 0)
enum dbg_channels {
dbg_err = (1 << 0),
dbg_debug = (1 << 1),