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rk3188: gpu use switch pll to support 594M at gpll, change cpll to 798M

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chenxing
2013-04-03 10:17:35 +08:00
parent 78b85738fe
commit 3d09c90a23
2 changed files with 3 additions and 3 deletions
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2
arch/arm/mach-rk3188/clock_data.c
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@@ -1375,7 +1375,7 @@ static struct clk aclk_gpu = {
.mode = gate_mode,
.recalc = clksel_recalc_div,
.round_rate = clk_freediv_round_autosel_parents_rate,
.set_rate = clksel_set_rate_freediv,
.set_rate = clkset_rate_freediv_autosel_parents,
.clksel_con = CRU_CLKSELS_CON(34),
.gate_idx = CLK_GATE_ACLK_GPU,
CRU_DIV_SET(0x1f, 0, 32),

4
arch/arm/mach-rk3188/include/mach/board.h
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@@ -76,9 +76,9 @@ enum _codec_pll {
#if (RK30_CLOCKS_DEFAULT_FLAGS&CLK_FLG_UART_1_3M)
#define codec_pll_default codec_pll_768mhz
#else
#define codec_pll_default codec_pll_1200mhz
#define codec_pll_default codec_pll_798mhz
#endif
#define periph_pll_default periph_pll_297mhz
#define periph_pll_default periph_pll_594mhz
#endif