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arm64: dts: rockchip: rk1808 add csi host interrupt

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Change-Id: Ic56e5052e244ffaa27456be6b8c5564fdbdb945b
Signed-off-by: Wenlong Zhuang <daisen.zhuang@rock-chips.com>
This commit is contained in:
Wenlong Zhuang
2019-01-18 15:48:20 +08:00
committed by Tao Huang
parent d664b37548
commit 3dc4f31060
1 changed files with 4 additions and 1 deletions
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5
arch/arm64/boot/dts/rockchip/rk1808.dtsi
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@@ -1290,7 +1290,10 @@
compatible = "rockchip,rk1808-cif";
reg = <0x0 0xffae0000 0x0 0x200>, <0x0 0xffb10000 0x0 0x100>;
reg-names = "cif_regs", "csihost_regs";
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cif-intr", "csi-intr1", "csi-intr2";
clocks = <&cru ACLK_CIF>, <&cru DCLK_CIF>,
<&cru HCLK_CIF>, <&cru SCLK_CIF_OUT>,
<&cru PCLK_CSI2HOST>;