dts: tl1: enable resample for tl1 [1/2]

PD#SWPL-3365

Problem:
not resample for audio in, so output in wrong sample rate

Solution:
1. enable resample in dts
2. fix to check whether resample is needed

Verify:
x301

Change-Id: I99238cc21a00ab53df6a1f8ab1703bc9ab48cbaa
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
This commit is contained in:
Xing Wang
2019-01-15 17:15:34 +08:00
committed by Jianxin Pan
parent 3c88d9d437
commit 3dddcd96a7
8 changed files with 58 additions and 55 deletions

View File

@@ -1314,7 +1314,7 @@
* 7: "Enable:192K",
*/
asrc_id = <0>;
auto_asrc = <0>;
auto_asrc = <3>;
status = "okay";
};
@@ -1397,8 +1397,8 @@
asrca: resample@0 {
compatible = "amlogic, tl1-resample-a";
clocks = <&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_MCLK_F
clocks = <&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_MCLK_A
&clkaudio CLKID_AUDIO_RESAMPLE_A>;
clock-names = "resample_pll", "resample_src", "resample_clk";
/*same with toddr_src
@@ -1413,7 +1413,7 @@
*/
resample_module = <3>;
status = "disabled";
status = "okay";
};
asrcb: resample@1 {

View File

@@ -1317,7 +1317,7 @@
* 7: "Enable:192K",
*/
asrc_id = <0>;
auto_asrc = <0>;
auto_asrc = <3>;
status = "okay";
};
@@ -1400,8 +1400,8 @@
asrca: resample@0 {
compatible = "amlogic, tl1-resample-a";
clocks = <&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_MCLK_F
clocks = <&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_MCLK_A
&clkaudio CLKID_AUDIO_RESAMPLE_A>;
clock-names = "resample_pll", "resample_src", "resample_clk";
/*same with toddr_src
@@ -1416,7 +1416,7 @@
*/
resample_module = <3>;
status = "disabled";
status = "okay";
};
asrcb: resample@1 {

View File

@@ -1312,7 +1312,7 @@
* 7: "Enable:192K",
*/
asrc_id = <0>;
auto_asrc = <0>;
auto_asrc = <3>;
status = "okay";
};
@@ -1395,8 +1395,8 @@
asrca: resample@0 {
compatible = "amlogic, tl1-resample-a";
clocks = <&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_MCLK_F
clocks = <&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_MCLK_A
&clkaudio CLKID_AUDIO_RESAMPLE_A>;
clock-names = "resample_pll", "resample_src", "resample_clk";
/*same with toddr_src
@@ -1411,7 +1411,7 @@
*/
resample_module = <3>;
status = "disabled";
status = "okay";
};
asrcb: resample@1 {

View File

@@ -1312,7 +1312,7 @@
* 7: "Enable:192K",
*/
asrc_id = <0>;
auto_asrc = <0>;
auto_asrc = <3>;
status = "okay";
};
@@ -1395,8 +1395,8 @@
asrca: resample@0 {
compatible = "amlogic, tl1-resample-a";
clocks = <&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_MCLK_F
clocks = <&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_MCLK_A
&clkaudio CLKID_AUDIO_RESAMPLE_A>;
clock-names = "resample_pll", "resample_src", "resample_clk";
/*same with toddr_src
@@ -1411,7 +1411,7 @@
*/
resample_module = <3>;
status = "disabled";
status = "okay";
};
asrcb: resample@1 {

View File

@@ -164,8 +164,6 @@ int fetch_toddr_index_by_src(int toddr_src)
}
}
pr_err("invalid toddr src\n");
return -1;
}
@@ -180,8 +178,6 @@ struct toddr *fetch_toddr_by_src(int toddr_src)
}
}
pr_err("invalid toddr src\n");
return NULL;
}
@@ -490,8 +486,6 @@ void aml_toddr_set_resample(struct toddr *to, bool enable)
unsigned int reg_base = to->reg_base;
unsigned int reg;
pr_debug("toddr selects data to %s resample\n",
enable ? "enable" : "disable");
reg = calc_toddr_address(EE_AUDIO_TODDR_A_CTRL0, reg_base);
aml_audiobus_update_bits(actrl, reg, 1<<30, enable<<30);
}
@@ -502,9 +496,6 @@ void aml_toddr_set_resample_ab(struct toddr *to, int asrc_src_sel, bool enable)
unsigned int reg_base = to->reg_base;
unsigned int reg;
pr_debug("toddr selects data to %s resample %c\n",
enable ? "enable" : "disable",
(asrc_src_sel == 0) ? 'a' : 'b');
reg = calc_toddr_address(EE_AUDIO_TODDR_A_CTRL1, reg_base);
if (asrc_src_sel == 0)
aml_audiobus_update_bits(actrl, reg, 1 << 27, enable << 27);
@@ -537,11 +528,12 @@ static void aml_resample_enable(
}
}
pr_info("Resample %d in running, module:%d, toddr:%d, asrc_src_sel:%d\n",
p_attach_resample->id,
p_attach_resample->attach_module,
pr_info("toddr %d selects data to %s resample_%c for module:%s\n",
to->fifo_id,
to->asrc_src_sel);
enable ? "enable" : "disable",
(p_attach_resample->id == 0) ? 'a' : 'b',
toddr_src_get_str(p_attach_resample->attach_module)
);
if (enable) {
int bitwidth = to->bitdepth;
@@ -906,7 +898,6 @@ int fetch_frddr_index_by_src(int frddr_src)
}
}
pr_err("invalid frdd_src\n");
return -1;
}
@@ -921,8 +912,6 @@ struct frddr *fetch_frddr_by_src(int frddr_src)
}
}
pr_err("invalid frddr src\n");
return NULL;
}

View File

@@ -14,6 +14,8 @@
* more details.
*
*/
#define DEBUG
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
@@ -105,19 +107,6 @@ static int resample_clk_set(struct audioresample *p_resample)
/* enable clock */
if (p_resample->enable) {
ret = clk_prepare_enable(p_resample->clk);
if (ret) {
pr_err("Can't enable resample_clk clock: %d\n",
ret);
return -EINVAL;
}
ret = clk_prepare_enable(p_resample->sclk);
if (ret) {
pr_err("Can't enable resample_src clock: %d\n",
ret);
return -EINVAL;
}
if (p_resample->out_rate) {
#ifdef __PTM_RESAMPLE_CLK__
@@ -144,6 +133,20 @@ static int resample_clk_set(struct audioresample *p_resample)
return -EINVAL;
}
ret = clk_prepare_enable(p_resample->sclk);
if (ret) {
pr_err("Can't enable resample_src clock: %d\n",
ret);
return -EINVAL;
}
ret = clk_prepare_enable(p_resample->clk);
if (ret) {
pr_err("Can't enable resample_clk clock: %d\n",
ret);
return -EINVAL;
}
pr_info("%s, resample_pll:%lu, sclk:%lu, clk:%lu\n",
__func__,
clk_get_rate(p_resample->pll),
@@ -226,7 +229,7 @@ static int resample_get_enum(
struct audioresample *p_resample = snd_kcontrol_chip(kcontrol);
if (!p_resample) {
pr_info("audio resample is not init\n");
pr_debug("audio resample is not init\n");
return 0;
}
@@ -248,8 +251,9 @@ int resample_set(int id, int index)
p_resample->asrc_rate_idx = index;
pr_info("%s %s\n",
pr_info("%s resample_%c %s\n",
__func__,
(id == 0) ? 'a' : 'b',
auge_resample_texts[index]);
if (audio_resample_set(p_resample, (bool)index, resample_rate))
@@ -274,7 +278,7 @@ static int resample_set_enum(
int index = ucontrol->value.enumerated.item[0];
if (!p_resample) {
pr_info("audio resample is not init\n");
pr_debug("audio resample is not init\n");
return 0;
}
@@ -355,7 +359,7 @@ static int resample_module_get_enum(
struct audioresample *p_resample = snd_kcontrol_chip(kcontrol);
if (!p_resample) {
pr_info("audio resample is not init\n");
pr_debug("audio resample is not init\n");
return 0;
}
@@ -371,7 +375,7 @@ static int resample_module_set_enum(
struct audioresample *p_resample = snd_kcontrol_chip(kcontrol);
if (!p_resample) {
pr_info("audio resample is not init\n");
pr_debug("audio resample is not init\n");
return 0;
}
@@ -582,4 +586,3 @@ static struct platform_driver resample_platform_driver = {
.probe = resample_platform_probe,
};
module_platform_driver(resample_platform_driver);

View File

@@ -70,8 +70,8 @@ int resample_init(int id, int input_sr)
else
pr_err("unsupport input sample rate:%d\n", input_sr);
pr_info("resample id:%d, clk_rate = %u, input_sr = %d, Avg_cnt_init = %u\n",
id,
pr_info("resample id:%c, clk_rate = %u, input_sr = %d, Avg_cnt_init = %u\n",
(id == 0) ? 'a' : 'b',
clk_rate,
input_sr,
Avg_cnt_init);

View File

@@ -51,6 +51,8 @@
/* for debug */
/*#define __SPDIFIN_INSERT_CHNUM__*/
/*#define __SPDIFIN_AUDIO_TYPE_HW__*/
struct spdif_chipinfo {
unsigned int id;
@@ -560,11 +562,12 @@ static void spdifin_status_event(struct aml_spdif *p_spdif)
pr_info("Event: EXTCON_SPDIFIN_SAMPLERATE, new sample rate:%s\n",
spdifin_samplerate[mode + 1]);
#ifdef __SPDIFIN_AUDIO_TYPE_HW__
/* resample enable, by hw */
if (!spdifin_check_audiotype_by_sw(p_spdif))
resample_set(p_spdif->asrc_id,
p_spdif->auto_asrc);
#endif
extcon_set_state(p_spdif->edev,
EXTCON_SPDIFIN_SAMPLERATE, 1);
}
@@ -582,9 +585,11 @@ static void spdifin_status_event(struct aml_spdif *p_spdif)
EXTCON_SPDIFIN_AUDIOTYPE, 1);
#ifdef __PTM_SPDIF_CLK__
#ifdef __SPDIFIN_AUDIO_TYPE_HW__
/* resample disable, by hw */
if (!spdifin_check_audiotype_by_sw(p_spdif))
resample_set(p_spdif->asrc_id, 0);
#endif
#endif
}
if (intrpt_status & 0x10)
@@ -614,9 +619,11 @@ static void spdifin_status_event(struct aml_spdif *p_spdif)
extcon_set_state(p_spdif->edev,
EXTCON_SPDIFIN_AUDIOTYPE, 0);
#ifdef __SPDIFIN_AUDIO_TYPE_HW__
/* resample to 48k, by hw */
if (!spdifin_check_audiotype_by_sw(p_spdif))
resample_set(p_spdif->asrc_id, p_spdif->auto_asrc);
#endif
}
if (intrpt_status & 0x40)
pr_info("valid changed\n");
@@ -969,9 +976,12 @@ static int aml_dai_spdif_startup(
pr_err("Can't enable pcm clk_spdifin clock: %d\n", ret);
goto err;
}
#ifdef __SPDIFIN_AUDIO_TYPE_HW__
/* resample to 48k in default, by hw */
if (!spdifin_check_audiotype_by_sw(p_spdif))
resample_set(p_spdif->asrc_id, p_spdif->auto_asrc);
#endif
}
return 0;
@@ -998,10 +1008,11 @@ static void aml_dai_spdif_shutdown(
clk_disable_unprepare(p_spdif->sysclk);
clk_disable_unprepare(p_spdif->gate_spdifout);
} else {
#ifdef __SPDIFIN_AUDIO_TYPE_HW__
/* resample disabled, by hw */
if (!spdifin_check_audiotype_by_sw(p_spdif))
resample_set(p_spdif->asrc_id, 0);
#endif
clk_disable_unprepare(p_spdif->clk_spdifin);
clk_disable_unprepare(p_spdif->fixed_clk);
clk_disable_unprepare(p_spdif->gate_spdifin);