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drm/rockchip: analogix_dp: add analogix_dp_devtype RK3576_EDP

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RK3588_EDP dones not support hsync/vsync polarity configuration,
while RK3576_EDP does.

Change-Id: Ic24628333a81427e2141adcf544a05254a1586e0
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
This commit is contained in:
Damon Ding
2024-04-17 14:59:02 +08:00
parent 4b0cca3790
commit 3f53efd971
4 changed files with 5 additions and 1 deletions
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1
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
View File

@@ -2070,6 +2070,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp)
video_info->max_lane_count = 0x04;
break;
case RK3399_EDP:
case RK3576_EDP:
case RK3588_EDP:
video_info->max_link_rate = 0x14;
video_info->max_lane_count = 0x04;

1
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
View File

@@ -1012,6 +1012,7 @@ static void analogix_dp_reuse_spd(struct analogix_dp_device *dp)
u32 reg, val;
switch (dp->plat_data->dev_type) {
case RK3576_EDP:
case RK3588_EDP:
reg = ANALOGIX_DP_SPDIF_AUDIO_CTL_0;
break;

2
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
View File

@@ -829,7 +829,7 @@ static const struct rockchip_dp_chip_data rk3568_edp[] = {
static const struct rockchip_dp_chip_data rk3576_edp[] = {
{
.chip_type = RK3588_EDP,
.chip_type = RK3576_EDP,
.spdif_sel = GRF_REG_FIELD(0x0000, 5, 5),
.i2s_sel = GRF_REG_FIELD(0x0000, 4, 4),
.mem_clk_auto_gating = GRF_REG_FIELD(0x0020, 1, 1),

2
include/drm/bridge/analogix_dp.h
View File

@@ -17,6 +17,7 @@ enum analogix_dp_devtype {
RK3288_DP,
RK3399_EDP,
RK3568_EDP,
RK3576_EDP,
RK3588_EDP,
};
@@ -26,6 +27,7 @@ static inline bool is_rockchip(enum analogix_dp_devtype type)
case RK3288_DP:
case RK3399_EDP:
case RK3568_EDP:
case RK3576_EDP:
case RK3588_EDP:
return true;
default: