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arm64: dts: qcom: sm6375: Add TSENS
Add nodes for the two TSENS v2.8.0 controllers present on the SoC. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230303-topic-sm6375_features0_dts-v2-10-708b8191f7eb@linaro.org
This commit is contained in:
committed by
Bjorn Andersson
parent
2f51d92314
commit
3f54391526
@@ -771,6 +771,28 @@
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#interrupt-cells = <4>;
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};
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tsens0: thermal-sensor@4411000 {
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compatible = "qcom,sm6375-tsens", "qcom,tsens-v2";
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reg = <0 0x04411000 0 0x140>, /* TM */
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<0 0x04410000 0 0x20>; /* SROT */
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interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow", "critical";
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#thermal-sensor-cells = <1>;
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#qcom,sensors = <15>;
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};
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tsens1: thermal-sensor@4413000 {
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compatible = "qcom,sm6375-tsens", "qcom,tsens-v2";
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reg = <0 0x04413000 0 0x140>, /* TM */
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<0 0x04412000 0 0x20>; /* SROT */
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interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow", "critical";
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#thermal-sensor-cells = <1>;
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#qcom,sensors = <11>;
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};
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rpm_msg_ram: sram@45f0000 {
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compatible = "qcom,rpm-msg-ram";
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reg = <0 0x045f0000 0 0x7000>;
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