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arm64: dts: rockchip: add voppwm support for rk3399

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Change-Id: I16b4f77083c05ffa71d569e378ea6e3cc9b1ee54
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This commit is contained in:
David Wu
2016-04-05 21:58:04 +08:00
committed by Jianqun Xu
parent 454e2669d1
commit 413e7e6b0a
1 changed files with 26 additions and 4 deletions
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30
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -1239,7 +1239,7 @@
compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff420000 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
clocks = <&pmucru PCLK_RKPWM_PMU>;
clock-names = "pwm";
@@ -1250,7 +1250,7 @@
compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff420010 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
clocks = <&pmucru PCLK_RKPWM_PMU>;
clock-names = "pwm";
@@ -1261,7 +1261,7 @@
compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff420020 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
clocks = <&pmucru PCLK_RKPWM_PMU>;
clock-names = "pwm";
@@ -1272,7 +1272,7 @@
compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff420030 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3a_pin>;
clocks = <&pmucru PCLK_RKPWM_PMU>;
clock-names = "pwm";
@@ -1763,6 +1763,17 @@
};
};
vop1_pwm: voppwm@ff8f01a0 {
compatible = "rockchip,vop-pwm";
reg = <0x0 0xff8f01a0 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&vop1_pwm_pin>;
clocks = <&cru SCLK_VOP1_PWM>;
clock-names = "pwm";
status = "disabled";
};
vopl_mmu: iommu@ff8f3f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff8f3f00 0x0 0x100>;
@@ -1820,6 +1831,17 @@
};
};
vop0_pwm: voppwm@ff9001a0 {
compatible = "rockchip,vop-pwm";
reg = <0x0 0xff9001a0 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&vop0_pwm_pin>;
clocks = <&cru SCLK_VOP0_PWM>;
clock-names = "pwm";
status = "disabled";
};
vopb_mmu: iommu@ff903f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff903f00 0x0 0x100>;