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arm64: dts: rockchip: rk3568: Add Legacy INT support for PCIe
Change-Id: I9afd5332467d35e3450a228a8cb4d7f94426881a Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This commit is contained in:
@@ -2049,6 +2049,12 @@
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<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "sys", "pmc", "msg", "legacy", "err";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie2x1_intc 0>,
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<0 0 0 2 &pcie2x1_intc 1>,
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<0 0 0 3 &pcie2x1_intc 2>,
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<0 0 0 4 &pcie2x1_intc 3>;
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linux,pci-domain = <0>;
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num-ib-windows = <6>;
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num-ob-windows = <2>;
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@@ -2067,6 +2073,14 @@
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resets = <&cru SRST_PCIE20_POWERUP>;
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reset-names = "pipe";
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status = "disabled";
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pcie2x1_intc: legacy-interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
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};
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};
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pcie3x1: pcie@fe270000 {
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@@ -2086,6 +2100,12 @@
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<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "sys", "pmc", "msg", "legacy", "err";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie3x1_intc 0>,
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<0 0 0 2 &pcie3x1_intc 1>,
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<0 0 0 3 &pcie3x1_intc 2>,
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<0 0 0 4 &pcie3x1_intc 3>;
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linux,pci-domain = <1>;
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num-ib-windows = <6>;
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num-ob-windows = <2>;
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@@ -2105,6 +2125,14 @@
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reset-names = "pipe";
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/* rockchip,bifurcation; lane1 when using 1+1 */
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status = "disabled";
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pcie3x1_intc: legacy-interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>;
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};
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};
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pcie3x2: pcie@fe280000 {
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@@ -2124,6 +2152,12 @@
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<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "sys", "pmc", "msg", "legacy", "err";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie3x2_intc 0>,
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<0 0 0 2 &pcie3x2_intc 1>,
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<0 0 0 3 &pcie3x2_intc 2>,
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<0 0 0 4 &pcie3x2_intc 3>;
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linux,pci-domain = <2>;
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num-ib-windows = <6>;
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num-ob-windows = <2>;
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@@ -2143,6 +2177,14 @@
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reset-names = "pipe";
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/* rockchip,bifurcation; lane0 when using 1+1 */
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status = "disabled";
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pcie3x2_intc: legacy-interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 162 IRQ_TYPE_EDGE_RISING>;
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};
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};
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gmac0: ethernet@fe2a0000 {
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