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Revert "usb: dwc3: make usb2 phy interface configurable in DT"

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This reverts commit 2ef6df639e.
This commit is contained in:
Wu Liang feng
2016-08-10 11:18:59 +08:00
committed by Huang, Tao
parent c72a0f9780
commit 42ecebd65f
4 changed files with 0 additions and 24 deletions
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2
Documentation/devicetree/bindings/usb/dwc3.txt
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@@ -20,8 +20,6 @@ Optional properties:
Only really useful for FPGA builds.
- snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
- snps,lpm-nyet-threshold: LPM NYET threshold
- snps,phyif_utmi_16_bits: true when configure the core to support
UTMI+ PHY with an 16-bit interface.
- snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk
- snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
- snps,req_p1p2p3_quirk: when set, the core will always request for

13
drivers/usb/dwc3/core.c
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@@ -418,7 +418,6 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
static int dwc3_phy_setup(struct dwc3 *dwc)
{
u32 reg;
u32 usbtrdtim;
int ret;
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
@@ -511,15 +510,6 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
if (dwc->dis_u2_freeclk_exists_quirk)
reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
if (dwc->phyif_utmi_16_bits)
reg |= DWC3_GUSB2PHYCFG_PHYIF;
usbtrdtim = (reg & DWC3_GUSB2PHYCFG_PHYIF) ?
USBTRDTIM_UTMI_16_BIT : USBTRDTIM_UTMI_8_BIT;
reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
reg |= (usbtrdtim << DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT);
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
return 0;
@@ -937,8 +927,6 @@ static int dwc3_probe(struct platform_device *pdev)
"snps,dis_enblslpm_quirk");
dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev,
"snps,dis_u2_freeclk_exists_quirk");
dwc->phyif_utmi_16_bits = device_property_read_bool(dev,
"snps,phyif_utmi_16_bits");
dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
"snps,tx_de_emphasis_quirk");
@@ -975,7 +963,6 @@ static int dwc3_probe(struct platform_device *pdev)
dwc->dis_enblslpm_quirk = pdata->dis_enblslpm_quirk;
dwc->dis_u2_freeclk_exists_quirk =
pdata->dis_u2_freeclk_exists_quirk;
dwc->phyif_utmi_16_bits = pdata->phyif_utmi_16_bits;
dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
if (pdata->tx_de_emphasis)

8
drivers/usb/dwc3/core.h
View File

@@ -182,12 +182,7 @@
#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30)
#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
#define DWC3_GUSB2PHYCFG_ULPI_UTMI (1 << 4)
#define DWC3_GUSB2PHYCFG_PHYIF (1 << 3)
#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8)
#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK (0xf << 10)
#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT 10
#define USBTRDTIM_UTMI_8_BIT 9
#define USBTRDTIM_UTMI_16_BIT 5
/* Global USB2 PHY Vendor Control Register */
#define DWC3_GUSB2PHYACC_NEWREGREQ (1 << 25)
@@ -720,8 +715,6 @@ struct dwc3_scratchpad_array {
* @start_config_issued: true when StartConfig command has been issued
* @three_stage_setup: set if we perform a three phase setup
* @usb3_lpm_capable: set if hadrware supports Link Power Management
* @phyif_utmi_16_bits: set if configure the core to support UTMI+ PHY
* with an 16-bit interface
* @disable_scramble_quirk: set if we enable the disable scramble quirk
* @u2exit_lfps_quirk: set if we enable u2exit lfps quirk
* @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
@@ -870,7 +863,6 @@ struct dwc3 {
unsigned setup_packet_pending:1;
unsigned three_stage_setup:1;
unsigned usb3_lpm_capable:1;
unsigned phyif_utmi_16_bits:1;
unsigned disable_scramble_quirk:1;
unsigned u2exit_lfps_quirk:1;

1
drivers/usb/dwc3/platform_data.h
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@@ -25,7 +25,6 @@ struct dwc3_platform_data {
enum usb_dr_mode dr_mode;
bool tx_fifo_resize;
bool usb3_lpm_capable;
bool phyif_utmi_16_bits;
unsigned is_utmi_l1_suspend:1;
u8 hird_threshold;