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https://github.com/hardkernel/linux.git
synced 2026-06-06 02:50:49 +09:00
Merge tag 'v6.3-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Lower sd card speeds for two boards to make them run more reliable, missing 32k clock definition for Anbric xx3 devices, missing cache-levels for rk3588, fixed rk3326-board display supplies and more dt-schema fixes. * tag 'v6.3-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: correct panel supplies on some rk3326 boards arm64: dts: rockchip: use just "port" in panel on RockPro64 arm64: dts: rockchip: use just "port" in panel on Pinebook Pro arm64: dts: rockchip: Remove non-existing pwm-delay-us property arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices arm64: dts: rockchip: add rk3588 cache level information arm64: dts: rockchip: Lower SD card speed on rk3399 Pinebook Pro arm64: dts: rockchip: Lower sd speed on rk3566-soquartz ARM: dts: rockchip: fix a typo error for rk3288 spdif node arm64: dts: rockchip: Fix rk3399 GICv3 ITS node name Link: https://lore.kernel.org/r/10559306.CDJkKcVGEf@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -942,7 +942,7 @@
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status = "disabled";
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};
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spdif: sound@ff88b0000 {
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spdif: sound@ff8b0000 {
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compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
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reg = <0x0 0xff8b0000 0x0 0x10000>;
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#sound-dai-cells = <0>;
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@@ -24,6 +24,8 @@
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&internal_display {
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compatible = "elida,kd35t133";
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iovcc-supply = <&vcc_lcd>;
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vdd-supply = <&vcc_lcd>;
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};
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&pwm0 {
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@@ -235,10 +235,8 @@
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internal_display: panel@0 {
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reg = <0>;
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backlight = <&backlight>;
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iovcc-supply = <&vcc_lcd>;
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reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
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rotation = <270>;
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vdd-supply = <&vcc_lcd>;
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port {
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mipi_in_panel: endpoint {
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@@ -83,6 +83,8 @@
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&internal_display {
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compatible = "elida,kd35t133";
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iovcc-supply = <&vcc_lcd>;
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vdd-supply = <&vcc_lcd>;
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};
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&rk817 {
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@@ -59,6 +59,8 @@
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&internal_display {
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compatible = "elida,kd35t133";
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iovcc-supply = <&vcc_lcd>;
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vdd-supply = <&vcc_lcd>;
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};
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&rk817_charger {
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@@ -61,7 +61,6 @@
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pinctrl-names = "default";
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pinctrl-0 = <&bl_en>;
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pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
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pwm-delay-us = <10000>;
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};
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emmc_pwrseq: emmc-pwrseq {
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@@ -198,7 +198,6 @@
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power-supply = <&pp3300_disp>;
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pinctrl-names = "default";
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pinctrl-0 = <&bl_en>;
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pwm-delay-us = <10000>;
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};
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gpio_keys: gpio-keys {
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@@ -167,7 +167,6 @@
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pinctrl-names = "default";
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pinctrl-0 = <&bl_en>;
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pwms = <&pwm1 0 1000000 0>;
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pwm-delay-us = <10000>;
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};
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dmic: dmic {
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@@ -50,19 +50,9 @@
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pinctrl-0 = <&panel_en_pin>;
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power-supply = <&vcc3v3_panel>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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panel_in_edp: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&edp_out_panel>;
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};
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port {
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panel_in_edp: endpoint {
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remote-endpoint = <&edp_out_panel>;
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};
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};
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};
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@@ -943,7 +933,7 @@
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disable-wp;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
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sd-uhs-sdr104;
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sd-uhs-sdr50;
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vmmc-supply = <&vcc3v0_sd>;
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vqmmc-supply = <&vcc_sdio>;
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status = "okay";
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@@ -647,16 +647,10 @@
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avdd-supply = <&avdd>;
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backlight = <&backlight>;
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dvdd-supply = <&vcc3v3_s0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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mipi_in_panel: endpoint {
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remote-endpoint = <&mipi_out_panel>;
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};
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port {
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mipi_in_panel: endpoint {
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remote-endpoint = <&mipi_out_panel>;
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};
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};
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};
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@@ -552,7 +552,7 @@
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<0x0 0xfff10000 0 0x10000>, /* GICH */
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<0x0 0xfff20000 0 0x10000>; /* GICV */
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
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its: interrupt-controller@fee20000 {
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its: msi-controller@fee20000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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#msi-cells = <1>;
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@@ -16,8 +16,10 @@
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};
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&cru {
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assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
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assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
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assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
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assigned-clock-rates = <32768>, <1200000000>,
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<200000000>, <241500000>;
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};
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&gpio_keys_control {
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@@ -105,8 +105,10 @@
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};
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&cru {
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assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
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assigned-clock-rates = <1200000000>, <200000000>, <500000000>;
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assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
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assigned-clock-rates = <32768>, <1200000000>,
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<200000000>, <500000000>;
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};
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&dsi_dphy0 {
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@@ -598,7 +598,7 @@
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
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sd-uhs-sdr104;
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sd-uhs-sdr50;
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vmmc-supply = <&vcc3v3_sys>;
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vqmmc-supply = <&vcc_1v8>;
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status = "okay";
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@@ -222,6 +222,7 @@
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cache-size = <131072>;
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cache-line-size = <64>;
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cache-sets = <512>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -230,6 +231,7 @@
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cache-size = <131072>;
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cache-line-size = <64>;
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cache-sets = <512>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -238,6 +240,7 @@
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cache-size = <131072>;
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cache-line-size = <64>;
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cache-sets = <512>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -246,6 +249,7 @@
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cache-size = <131072>;
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cache-line-size = <64>;
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cache-sets = <512>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -254,6 +258,7 @@
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cache-size = <524288>;
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cache-line-size = <64>;
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cache-sets = <1024>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -262,6 +267,7 @@
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cache-size = <524288>;
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cache-line-size = <64>;
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cache-sets = <1024>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -270,6 +276,7 @@
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cache-size = <524288>;
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cache-line-size = <64>;
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cache-sets = <1024>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -278,6 +285,7 @@
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cache-size = <524288>;
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cache-line-size = <64>;
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cache-sets = <1024>;
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cache-level = <2>;
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next-level-cache = <&l3_cache>;
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};
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@@ -286,6 +294,7 @@
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cache-size = <3145728>;
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cache-line-size = <64>;
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cache-sets = <4096>;
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cache-level = <3>;
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};
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};
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