ARM: dts: rockchip: Add rv1106-smd-cam.dtsi

Move camera node from rv1106g-smart-door-lock-rmsl-v10.dts
 to rv1106-smd-cam.dtsi.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Id5ba57db302c5a20af1796cf147f186a6df34467
This commit is contained in:
Lin Jinhan
2022-05-20 16:27:57 +08:00
committed by Tao Huang
parent 437e0a901b
commit 4481fb8b8a
2 changed files with 201 additions and 147 deletions

View File

@@ -0,0 +1,200 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/input/input.h>
/ {
vcc1v2_dvdd: vcc1v8_dovdd: vcc2v8_avdd: vcc-camera {
compatible = "regulator-fixed";
regulator-name = "vcc_camera";
pinctrl-names = "default";
pinctrl-0 = <&cam_pwren>;
enable-active-high;
gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
};
cam_ircut0: cam_ircut {
status = "okay";
compatible = "rockchip,ircut";
ircut-open-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
ircut-close-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
};
cam_ir_vcc: cam_ir_vcc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam_ir_pwr>;
regulator-name = "cam_ir_vcc";
enable-active-high;
};
};
&csi2_dphy_hw {
status = "okay";
};
&csi2_dphy1 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dphy1_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&gc2093_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy1_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4m2_xfer>;
gc2093: gc2093@37 {
compatible = "galaxycore,gc2093";
status = "okay";
reg = <0x37>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
avdd-supply = <&vcc2v8_avdd>;
dovdd-supply = <&vcc1v8_dovdd>;
dvdd-supply = <&vcc1v2_dvdd>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "default";
rockchip,camera-module-lens-name = "default";
ir-cut = <&cam_ircut0>;
port {
gc2093_out: endpoint {
remote-endpoint = <&dphy1_in>;
data-lanes = <1 2>;
};
};
};
};
&rkcif {
status = "okay";
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&dphy1_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi0_in>;
data-lanes = <1 2>;
};
};
};
};
&rkcif_mipi_lvds {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
cif_mipi0_in: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
data-lanes = <1 2>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
mipi_lvds0_sditf: endpoint {
remote-endpoint = <&isp0_in>;
data-lanes = <1 2>;
};
};
};
&rkisp {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
ports {
port@0 {
isp0_in: endpoint {
remote-endpoint = <&mipi_lvds0_sditf>;
};
};
};
};
&pinctrl {
cam {
/* rgb camera power en */
cam_pwren: cam_pwren-pwr {
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
cam_ir_pwr: cam-ir-pwr {
rockchip,pins =
/* ir camera power en */
<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

View File

@@ -8,6 +8,7 @@
#include "rv1106.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1106-thunder-boot-spi-nor.dtsi"
#include "rv1106-smd-cam.dtsi"
/ {
model = "Rockchip RV1106G Smart Door Lock RMSL V10 Board";
@@ -48,14 +49,6 @@
regulator-max-microvolt = <3300000>;
};
vcc1v2_dvdd: vcc1v8_dovdd: vcc2v8_avdd: vcc-camera {
compatible = "regulator-fixed";
regulator-name = "vcc_camera";
regulator-boot-on;
gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_arm: vdd-arm {
compatible = "pwm-regulator";
pwms = <&pwm0 0 5000 1>;
@@ -78,42 +71,6 @@
};
};
&csi2_dphy_hw {
status = "okay";
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_input0: endpoint@0 {
reg = <0>;
remote-endpoint = <&gc2093_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_csi2_input>;
};
};
};
};
&acodec {
#sound-dai-cells = <0>;
pa-ctl-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
@@ -142,67 +99,6 @@
status = "disabled";
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4m2_xfer>;
gc2093: gc2093b@7e{ //RGB
status = "okay";
compatible = "galaxycore,gc2093";
reg = <0x7e>;
avdd-supply = <&vcc2v8_avdd>;
dovdd-supply = <&vcc1v8_dovdd>;
dvdd-supply = <&vcc1v2_dvdd>;
clock-names = "xvclk";
pinctrl-names = "default";
pwdn-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "YT-RV1109-2-V1";
rockchip,camera-module-lens-name = "40IR-2MP-F20";
port {
gc2093_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
data-lanes = <1 2>;
};
};
};
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi_dphy_output>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
};
};
};
};
&pinctrl {
mcu {
/omit-if-no-ref/
@@ -221,48 +117,6 @@
status = "okay";
};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mipi_pins>;
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp_in>;
};
};
};
&rkisp {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
port@0 {
isp_in: endpoint {
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
&sdio {
max-frequency = <50000000>;
bus-width = <1>;