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UPSTREAM: ARM64: dts: rockchip: update rk3399.dtsi for emmc&phy

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Change-Id: I97948c250f63423c5a7f305cfaa3a10b190f736f
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
This commit is contained in:
xiaoyao
2016-09-22 17:33:47 +08:00
committed by Huang, Tao
parent b56e9be360
commit 44c69f1dc0
1 changed files with 14 additions and 12 deletions
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26
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -328,15 +328,6 @@
status = "disabled";
};
emmc_phy: phy {
compatible = "rockchip,rk3399-emmc-phy";
reg-offset = <0xf780>;
#phy-cells = <0>;
rockchip,grf = <&grf>;
ctrl-base = <0xfe330000>;
status = "disabled";
};
sdio0: dwmmc@fe310000 {
compatible = "rockchip,rk3399-dw-mshc",
"rockchip,rk3288-dw-mshc";
@@ -369,11 +360,13 @@
compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
reg = <0x0 0xfe330000 0x0 0x10000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
arasan,soc-ctl-syscon = <&grf>;
assigned-clocks = <&cru SCLK_EMMC>;
assigned-clock-rates = <200000000>;
clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
clock-names = "clk_xin", "clk_ahb";
assigned-clocks = <&cru SCLK_EMMC>;
assigned-clock-parents = <&cru PLL_CPLL>;
assigned-clock-rates = <200000000>;
clock-output-names = "emmc_cardclock";
#clock-cells = <0>;
phys = <&emmc_phy>;
phy-names = "phy_arasan";
power-domains = <&power RK3399_PD_EMMC>;
@@ -1361,6 +1354,15 @@
#address-cells = <1>;
#size-cells = <1>;
emmc_phy: phy@f780 {
compatible = "rockchip,rk3399-emmc-phy";
reg = <0xf780 0x24>;
clocks = <&sdhci>;
clock-names = "emmcclk";
#phy-cells = <0>;
status = "disabled";
};
u2phy0: usb2-phy@e450 {
compatible = "rockchip,rk3399-usb2phy";
reg = <0xe450 0x10>;