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https://github.com/hardkernel/linux.git
synced 2026-06-11 05:17:10 +09:00
serial: tegra_hsuart: Use resources instead of platform data.
Use resources to pass data to tegra_hsuart to set mapbase, irq. Signed-off-by: Jaikumar Ganesh <jaikumar@google.com>
This commit is contained in:
@@ -638,102 +638,117 @@ struct platform_device tegra_pwfm3_device = {
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.resource = &tegra_pwfm3_resource,
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};
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static struct plat_serial8250_port tegra_uart0_port[] = {
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static struct resource tegra_uarta_resources[] = {
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[0] = {
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.mapbase = TEGRA_UARTA_BASE,
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.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
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.irq = INT_UARTA,
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.start = TEGRA_UARTA_BASE,
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.end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.flags = 0,
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.start = INT_UARTA,
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.end = INT_UARTA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct plat_serial8250_port tegra_uart1_port[] = {
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static struct resource tegra_uartb_resources[]= {
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[0] = {
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.mapbase = TEGRA_UARTB_BASE,
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.membase = IO_ADDRESS(TEGRA_UARTB_BASE),
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.irq = INT_UARTB,
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.start = TEGRA_UARTB_BASE,
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.end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.flags = 0,
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.start = INT_UARTB,
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.end = INT_UARTB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct plat_serial8250_port tegra_uart2_port[] = {
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static struct resource tegra_uartc_resources[] = {
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[0] = {
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.mapbase = TEGRA_UARTC_BASE,
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.membase = IO_ADDRESS(TEGRA_UARTC_BASE),
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.irq = INT_UARTC,
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.start = TEGRA_UARTC_BASE,
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.end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.flags = 0,
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.start = INT_UARTC,
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.end = INT_UARTC,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct plat_serial8250_port tegra_uart3_port[] = {
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static struct resource tegra_uartd_resources[] = {
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[0] = {
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.mapbase = TEGRA_UARTD_BASE,
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.irq = INT_UARTD,
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.start = TEGRA_UARTD_BASE,
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.end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.flags = 0,
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.start = INT_UARTD,
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.end = INT_UARTD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct plat_serial8250_port tegra_uart4_port[] = {
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static struct resource tegra_uarte_resources[] = {
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[0] = {
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.mapbase = TEGRA_UARTE_BASE,
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.membase = IO_ADDRESS(TEGRA_UARTE_BASE),
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.irq = INT_UARTE,
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.start = TEGRA_UARTE_BASE,
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.end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.flags = 0,
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.start = INT_UARTE,
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.end = INT_UARTE,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device tegra_uart0_device = {
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struct platform_device tegra_uarta_device = {
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.name = "tegra_uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(tegra_uarta_resources),
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.resource = tegra_uarta_resources,
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.dev = {
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.platform_data = tegra_uart0_port,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uart1_device = {
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struct platform_device tegra_uartb_device = {
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.name = "tegra_uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(tegra_uartb_resources),
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.resource = tegra_uartb_resources,
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.dev = {
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.platform_data = tegra_uart1_port,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uart2_device = {
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struct platform_device tegra_uartc_device = {
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.name = "tegra_uart",
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.id = 2,
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.num_resources = ARRAY_SIZE(tegra_uartc_resources),
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.resource = tegra_uartc_resources,
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.dev = {
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.platform_data = tegra_uart2_port,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uart3_device = {
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struct platform_device tegra_uartd_device = {
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.name = "tegra_uart",
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.id = 3,
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.num_resources = ARRAY_SIZE(tegra_uartd_resources),
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.resource = tegra_uartd_resources,
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.dev = {
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.platform_data = tegra_uart3_port,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device tegra_uart4_device = {
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struct platform_device tegra_uarte_device = {
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.name = "tegra_uart",
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.id = 4,
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.num_resources = ARRAY_SIZE(tegra_uarte_resources),
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.resource = tegra_uarte_resources,
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.dev = {
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.platform_data = tegra_uart4_port,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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@@ -50,11 +50,11 @@ extern struct platform_device tegra_pwfm1_device;
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extern struct platform_device tegra_pwfm2_device;
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extern struct platform_device tegra_pwfm3_device;
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extern struct platform_device tegra_otg_device;
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extern struct platform_device tegra_uart0_device;
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extern struct platform_device tegra_uart1_device;
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extern struct platform_device tegra_uart2_device;
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extern struct platform_device tegra_uart3_device;
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extern struct platform_device tegra_uart4_device;
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extern struct platform_device tegra_uarta_device;
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extern struct platform_device tegra_uartb_device;
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extern struct platform_device tegra_uartc_device;
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extern struct platform_device tegra_uartd_device;
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extern struct platform_device tegra_uarte_device;
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extern struct platform_device tegra_spdif_device;
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extern struct platform_device tegra_grhost_device;
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extern struct platform_device tegra_spdif_device;
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@@ -1221,8 +1221,8 @@ static int __devexit tegra_uart_remove(struct platform_device *pdev)
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static int tegra_uart_probe(struct platform_device *pdev)
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{
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struct tegra_uart_port *t;
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struct plat_serial8250_port *pdata = pdev->dev.platform_data;
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struct uart_port *u;
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struct resource *resource;
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int ret;
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char name[64];
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if (pdev->id < 0 || pdev->id > tegra_uart_driver.nr) {
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@@ -1242,9 +1242,20 @@ static int tegra_uart_probe(struct platform_device *pdev)
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u->ops = &tegra_uart_ops;
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u->type = ~PORT_UNKNOWN;
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u->fifosize = 32;
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u->mapbase = pdata->mapbase;
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u->membase = pdata->membase;
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u->irq = pdata->irq;
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resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (unlikely(!resource))
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return -ENXIO;
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u->mapbase = resource->start;
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u->membase = IO_ADDRESS(u->mapbase);
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if (unlikely(!u->membase))
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return -ENOMEM;
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u->irq = platform_get_irq(pdev, 0);
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if (unlikely(u->irq < 0))
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return -ENXIO;
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u->regshift = 2;
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t->clk = clk_get(&pdev->dev, NULL);
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