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misc: rk628: add apll regmap_range

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Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ib5ef51265385d1e3f741d66a89b34255b013c23d
This commit is contained in:
Shunhua Lan
2023-11-06 12:04:55 +08:00
committed by Tao Huang
parent cf0b23abaf
commit 457130662d
2 changed files with 6 additions and 0 deletions
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1
drivers/misc/rk628/rk628.c
View File

@@ -34,6 +34,7 @@
static const struct regmap_range rk628_cru_readable_ranges[] = {
regmap_reg_range(CRU_CPLL_CON0, CRU_CPLL_CON4),
regmap_reg_range(CRU_GPLL_CON0, CRU_GPLL_CON4),
regmap_reg_range(CRU_APLL_CON0, CRU_APLL_CON4),
regmap_reg_range(CRU_MODE_CON00, CRU_MODE_CON00),
regmap_reg_range(CRU_CLKSEL_CON00, CRU_CLKSEL_CON21),
regmap_reg_range(CRU_GATE_CON00, CRU_GATE_CON05),

5
drivers/misc/rk628/rk628_cru.h
View File

@@ -46,6 +46,11 @@
#define CRU_GPLL_CON2 CRU_REG(0x0028)
#define CRU_GPLL_CON3 CRU_REG(0x002c)
#define CRU_GPLL_CON4 CRU_REG(0x0030)
#define CRU_APLL_CON0 CRU_REG(0x0040)
#define CRU_APLL_CON1 CRU_REG(0x0044)
#define CRU_APLL_CON2 CRU_REG(0x0048)
#define CRU_APLL_CON3 CRU_REG(0x004c)
#define CRU_APLL_CON4 CRU_REG(0x0050)
#define CRU_MODE_CON00 CRU_REG(0x0060)
#define CLK_APLL_MODE_MASK BIT(4)
#define CLK_APLL_MODE_SHIFT 4