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phy: rockchip: inno-usb2: add linestate filter config for rk3588

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For linestate irq as a wakeup source, we need to reconfigure the
linestate filter value base on 32KHz clk at suspend time, and restore
it to the default when the system resume.

By the way, set the grf to handle the phy status when the system
suspend, which can support the linestate wakeup even the PD of the
USB controller was off for RK3588 OTG1 port.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I630855981082298d079d9c713029a7e3093b09cd
This commit is contained in:
Frank Wang
2022-04-27 15:41:48 +08:00
parent af77c1d2e1
commit 45d113ab59
1 changed files with 5 additions and 2 deletions
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7
drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -3420,6 +3420,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
.num_ports = 1,
.phy_tuning = rk3588_usb2phy_tuning,
.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
.ls_filter_con = { 0x0040, 19, 0, 0x30100, 0x00020 },
.port_cfgs = {
[USB2PHY_PORT_OTG] = {
.phy_sus = { 0x000c, 11, 11, 0, 1 },
@@ -3473,10 +3474,10 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
.num_ports = 1,
.phy_tuning = rk3588_usb2phy_tuning,
.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
.ls_filter_con = { 0x0040, 19, 0, 0x30100, 0x00020 },
.port_cfgs = {
/* Select suspend control from controller */
[USB2PHY_PORT_OTG] = {
.phy_sus = { 0x000c, 11, 11, 0, 0 },
.phy_sus = { 0x000c, 11, 11, 0, 1 },
.pipe_phystatus = { 0x0034, 3, 2, 0, 2 },
.bvalid_det_en = { 0x0080, 1, 1, 0, 1 },
.bvalid_det_st = { 0x0084, 1, 1, 0, 1 },
@@ -3524,6 +3525,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
.num_ports = 1,
.phy_tuning = rk3588_usb2phy_tuning,
.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
.ls_filter_con = { 0x0040, 19, 0, 0x30100, 0x00020 },
.port_cfgs = {
[USB2PHY_PORT_HOST] = {
.phy_sus = { 0x0008, 2, 2, 0, 1 },
@@ -3545,6 +3547,7 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
.num_ports = 1,
.phy_tuning = rk3588_usb2phy_tuning,
.clkout_ctl = { 0x0000, 0, 0, 1, 0 },
.ls_filter_con = { 0x0040, 19, 0, 0x30100, 0x00020 },
.port_cfgs = {
[USB2PHY_PORT_HOST] = {
.phy_sus = { 0x0008, 2, 2, 0, 1 },