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clk: rockchip: rk3399: export SCLK_I2SOUT_SRC clk ID for i2s
Change-Id: Ifbcea830e5f49946c1feea3f51d125e6ed566d5f Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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@@ -714,7 +714,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
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GATE(SCLK_I2S2_8CH, "clk_i2s2", "clk_i2s2_mux", CLK_SET_RATE_PARENT,
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RK3399_CLKGATE_CON(8), 11, GFLAGS),
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MUX(0, "clk_i2sout_src", mux_i2sch_p, CLK_SET_RATE_PARENT,
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MUX(SCLK_I2SOUT_SRC, "clk_i2sout_src", mux_i2sch_p, CLK_SET_RATE_PARENT,
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RK3399_CLKSEL_CON(31), 0, 2, MFLAGS),
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COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "clk_i2sout", mux_i2sout_p, CLK_SET_RATE_PARENT,
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RK3399_CLKSEL_CON(31), 2, 1, MFLAGS,
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@@ -30,6 +30,7 @@
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#define ARMCLKB 9
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/* sclk gates (special clocks) */
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#define SCLK_I2SOUT_SRC 64
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#define SCLK_I2C1 65
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#define SCLK_I2C2 66
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#define SCLK_I2C3 67
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