arm64: dts: rockchip: Add RK3562 linux amp dts

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: I896bb705fbabfe032879bd03d21964f220141e76
This commit is contained in:
Steven Liu
2023-01-12 18:01:05 +08:00
committed by Tao Huang
parent 6125424e87
commit 4663ac10bc
3 changed files with 44 additions and 0 deletions

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@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb4-ddr4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-iotest-lp3-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb1-lp4x-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb1-lp4x-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb1-lp4x-v10-linux-amp.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb1-lp4x-v10-lvds.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb2-ddr4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb2-ddr4-v10-linux.dtb

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@@ -0,0 +1,33 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
/ {
rockchip_amp: rockchip-amp {
compatible = "rockchip,mcu-amp";
clocks = <&cru FCLK_BUS_CM0_CORE>, <&cru CLK_BUS_CM0_RTC>,
<&cru SCLK_UART5>, <&cru PCLK_UART5>,
<&cru PCLK_TIMER>, <&cru CLK_TIMER5>;
clock-names = "fclk_bus_cm0_core", "clk_bus_cm0_rtc",
"baudclk", "apb_pclk", "pclk", "timer";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
status = "okay";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* mcu address */
mcu_reserved: mcu@8200000 {
reg = <0x0 0x8200000 0x0 0x100000>;
no-map;
};
};
};

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@@ -0,0 +1,10 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*
*/
#include "rk3562-evb1-lp4x-v10.dtsi"
#include "rk3562-linux.dtsi"
#include "rk3562-rk817.dtsi"
#include "rk3562-amp.dtsi"