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media: i2c: sc1346: fix fps error
vts_def should be 0x02ee instead of 0x0708. Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Change-Id: Ie9d7af19d3e24b03f46e8dae3828ab7ae585c208
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@@ -40,7 +40,7 @@
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#define PIXEL_RATE_WITH_375M_10BIT (SC1346_LINK_FREQ_375 * 2 * \
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SC1346_LANES / SC1346_BITS_PER_SAMPLE)
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#define SC1346_XVCLK_FREQ 24000000
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#define SC1346_XVCLK_FREQ 27000000
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#define CHIP_ID 0xda4d
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#define SC1346_REG_CHIP_ID 0x3107
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@@ -160,26 +160,26 @@ struct sc1346 {
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#define to_sc1346(sd) container_of(sd, struct sc1346, subdev)
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/*
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* Xclk 24Mhz
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* Xclk 27Mhz
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*/
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static const struct regval sc1346_global_regs[] = {
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{REG_NULL, 0x00},
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};
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/*
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* Xclk 24Mhz
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* Xclk 27Mhz
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* max_framerate 30fps
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* mipi_datarate per lane 630Mbps, 2lane
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* mipi_datarate per lane 371.25Mbps, 1lane
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*/
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static const struct regval sc1346_linear_10_2560x1440_regs[] = {
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static const struct regval sc1346_linear_10_1280x720_regs[] = {
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{0x0103, 0x01},
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{0x0100, 0x00},
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{0x36e9, 0x80},
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{0x37f9, 0x80},
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{0x301f, 0x01},
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{0x3106, 0x05},
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{0x320e, 0x04},
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{0x320f, 0x65},
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{0x320e, 0x02},
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{0x320f, 0xee},
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{0x3301, 0x06},
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{0x3306, 0x50},
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{0x3308, 0x0a},
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@@ -277,9 +277,9 @@ static const struct sc1346_mode supported_modes[] = {
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},
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.exp_def = 0x0080,
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.hts_def = 0x0250 * 2,
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.vts_def = 0x0708,
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.vts_def = 0x02ee,
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.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
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.reg_list = sc1346_linear_10_2560x1440_regs,
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.reg_list = sc1346_linear_10_1280x720_regs,
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.hdr_mode = NO_HDR,
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.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
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}
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@@ -913,7 +913,7 @@ static int __sc1346_power_on(struct sc1346 *sc1346)
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}
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ret = clk_set_rate(sc1346->xvclk, SC1346_XVCLK_FREQ);
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if (ret < 0)
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dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
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dev_warn(dev, "Failed to set xvclk rate (27MHz)\n");
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if (clk_get_rate(sc1346->xvclk) != SC1346_XVCLK_FREQ)
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dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
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ret = clk_prepare_enable(sc1346->xvclk);
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