audio: mclk pad0 doesn't output clk [1/1]

PD#OTT-5603

Problem:
Configurate GPIO_AO 9 as mclk_0,it doesn't work.

Solution:
From SM1, the mclk pad register is changed.
Using standard clk tree to make it compitable.

Verify:
TM2, SM1.

Change-Id: I8d53296297536c90768495232570f33fc89db131
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
This commit is contained in:
Shuai Li
2019-09-06 16:26:02 +08:00
committed by Luke Go
parent b0193feb46
commit 47408422ea
12 changed files with 28 additions and 12 deletions

View File

@@ -1104,10 +1104,11 @@
//dai-tdm-lane-slot-mask-out = <1 1 1 1 1 1 1 1>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;

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@@ -1152,10 +1152,11 @@
//dai-tdm-lane-slot-mask-out = <1 1 1 1 1 1 1 1>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
/*pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;*/

View File

@@ -1150,10 +1150,11 @@
//dai-tdm-lane-slot-mask-out = <1 1 1 1 1 1 1 1>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
/*pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;*/

View File

@@ -1102,10 +1102,11 @@
dai-tdm-lane-slot-mask-out = <1 0 0 0>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;

View File

@@ -1098,10 +1098,11 @@
dai-tdm-lane-slot-mask-out = <1 0 0 0>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;

View File

@@ -1104,10 +1104,11 @@
dai-tdm-lane-slot-mask-out = <1 0 0 0>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;

View File

@@ -1149,10 +1149,11 @@
//dai-tdm-lane-slot-mask-out = <1 1 1 1 1 1 1 1>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
/*pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;*/

View File

@@ -1149,10 +1149,11 @@
//dai-tdm-lane-slot-mask-out = <1 1 1 1 1 1 1 1>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
/*pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;*/

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@@ -1100,10 +1100,11 @@
dai-tdm-lane-slot-mask-out = <1 0 0 0>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;

View File

@@ -1175,10 +1175,11 @@
dai-tdm-lane-slot-mask-out = <1 0 0 0>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
&clkaudio CLKID_AUDIO_MCLK_PAD0
&clkc CLKID_MPLL1
&clkc CLKID_MPLL0
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "mclk", "clk_srcpll",
clock-names = "mclk", "mclk_pad", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
pinctrl-names = "tdm_pins";
pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;

View File

@@ -88,5 +88,8 @@
#define CLKID_EARCRX_CMDC (MCLK_BASE + 20)
#define CLKID_EARCRX_DMAC (MCLK_BASE + 21)
#define NUM_AUDIO_CLKS (MCLK_BASE + 22)
#define CLKID_AUDIO_MCLK_PAD0 (MCLK_BASE + 22)
#define CLKID_AUDIO_MCLK_PAD1 (MCLK_BASE + 23)
#define NUM_AUDIO_CLKS (MCLK_BASE + 24)
#endif /* __SM1_AUDIO_CLK_H__ */

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@@ -93,5 +93,8 @@
#define CLKID_EARCRX_CMDC (MCLK_BASE + 20)
#define CLKID_EARCRX_DMAC (MCLK_BASE + 21)
#define NUM_AUDIO_CLKS (MCLK_BASE + 22)
#define CLKID_AUDIO_MCLK_PAD0 (MCLK_BASE + 22)
#define CLKID_AUDIO_MCLK_PAD1 (MCLK_BASE + 23)
#define NUM_AUDIO_CLKS (MCLK_BASE + 24)
#endif /* __TM2_AUDIO_CLK_H__ */