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arm64: tegra: Fix non-prefetchable aperture of PCIe C3 controller

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Fix the starting address of the non-prefetchable aperture of PCIe C3
controller.

Fixes: ec142c44b0 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Vidya Sagar
2022-10-25 23:55:08 +05:30
committed by Thierry Reding
parent b8f44643d6
commit 47a2f35d9e
1 changed files with 1 additions and 1 deletions
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arch/arm64/boot/dts/nvidia/tegra234.dtsi
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@@ -2350,7 +2350,7 @@
bus-range = <0x0 0xff>;
ranges = <0x43000000 0x21 0x00000000 0x21 0x00000000 0x0 0x28000000>, /* prefetchable memory (640 MB) */
<0x02000000 0x0 0x40000000 0x21 0xe8000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
<0x02000000 0x0 0x40000000 0x21 0x28000000 0x0 0x08000000>, /* non-prefetchable memory (128 MB) */
<0x01000000 0x0 0x34100000 0x00 0x34100000 0x0 0x00100000>; /* downstream I/O (1 MB) */
interconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE3R &emc>,