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pwm: fix several errors
PD#144476: pwm: fix pwm driver errors 1.change pwm e and f order 2.fix several errors you can request like this: PWM A 0 PWM B 1 PWM C 2 PWM D 3 PWM AO A 4 PWM AO B 5 PWM AO C 6 PWM AO D 7 Change-Id: Ic1ca7d1f0450db748569447140feab9b9d0c5c34 Signed-off-by: Jian Hu <jian.hu@amlogic.com>
This commit is contained in:
@@ -196,8 +196,6 @@ static int pwm_gxtvbb_enable(struct aml_pwm_chip *aml_chip,
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dev_err(aml_chip->chip.dev,
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"enable,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_set_reg_bits(&aml_reg->miscr, val, val);
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@@ -244,7 +242,6 @@ static int pwm_meson_enable(struct aml_pwm_chip *aml_chip,
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dev_err(aml_chip->chip.dev,
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"enable,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_set_reg_bits(&aml_reg->miscr, val, val);
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@@ -303,7 +300,7 @@ static void pwm_aml_disable(struct pwm_chip *chip,
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case PWM_AO_A2:
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case PWM_AO_C2:
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val = 0 << 25;
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mask = 25 << 1;
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mask = 1 << 25;
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break;
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case PWM_B2:
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case PWM_D2:
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@@ -311,7 +308,7 @@ static void pwm_aml_disable(struct pwm_chip *chip,
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case PWM_AO_B2:
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case PWM_AO_D2:
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val = 0 << 24;
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mask = 24 << 1;
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mask = 1 << 24;
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break;
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default:
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val = 0 << 0;
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@@ -456,8 +453,6 @@ static int pwm_meson_config_ext(struct aml_pwm_chip *aml_chip,
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dev_err(aml_chip->chip.dev,
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"config_ext,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_set_reg_bits(&aml_reg->miscr, clk_source_mask, clk_source_val);
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pwm_set_reg_bits(&aml_reg->miscr, clk_mask, clk_val);
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@@ -647,11 +642,11 @@ static int pwm_aml_parse_addr_axg(struct aml_pwm_chip *chip)
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if (IS_ERR(chip->baseaddr.cd_base))
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return PTR_ERR(chip->baseaddr.cd_base);
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chip->baseaddr.aoab_base = of_iomap(np, 3);
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chip->baseaddr.aoab_base = of_iomap(np, 2);
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if (IS_ERR(chip->baseaddr.aoab_base))
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return PTR_ERR(chip->baseaddr.aoab_base);
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chip->baseaddr.aocd_base = of_iomap(np, 4);
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chip->baseaddr.aocd_base = of_iomap(np, 3);
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if (IS_ERR(chip->baseaddr.aocd_base))
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return PTR_ERR(chip->baseaddr.aocd_base);
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@@ -66,7 +66,6 @@ int pwm_constant_enable(struct aml_pwm_chip *chip, int index)
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dev_err(aml_chip->chip.dev,
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"enable,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_set_reg_bits(&aml_reg->miscr, val, val);
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@@ -117,8 +116,6 @@ int pwm_constant_disable(struct aml_pwm_chip *chip, int index)
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dev_err(aml_chip->chip.dev,
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"constant disable,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_set_reg_bits(&aml_reg->miscr, mask, val);
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return 0;
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@@ -204,6 +201,7 @@ int pwm_set_times(struct aml_pwm_chip *chip,
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case PWM_AO_C:
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clear_val = 0xff << 24;
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val = value << 24;
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break;
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case PWM_B:
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case PWM_D:
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case PWM_F:
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@@ -219,6 +217,7 @@ int pwm_set_times(struct aml_pwm_chip *chip,
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case PWM_AO_C2:
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clear_val = 0xff << 16;
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val = value << 16;
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break;
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case PWM_B2:
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case PWM_D2:
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case PWM_F2:
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@@ -231,8 +230,6 @@ int pwm_set_times(struct aml_pwm_chip *chip,
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dev_err(aml_chip->chip.dev,
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"times,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_clear_reg_bits(&aml_reg->tr, clear_val);
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pwm_write_reg1(&aml_reg->tr, val);
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@@ -302,17 +299,18 @@ int pwm_blink_enable(struct aml_pwm_chip *chip, int index)
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case PWM_AO_A:
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case PWM_AO_C:
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val = 1 << 8;
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break;
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case PWM_B:
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case PWM_D:
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case PWM_F:
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case PWM_AO_B:
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case PWM_AO_D:
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val = 1 << 9;
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break;
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default:
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dev_err(aml_chip->chip.dev,
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"blink enable,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_set_reg_bits(&aml_reg->br, val, val);
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@@ -347,6 +345,7 @@ int pwm_blink_disable(struct aml_pwm_chip *chip, int index)
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case PWM_AO_C:
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mask = 1 << 8;
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val = 0 << 8;
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break;
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case PWM_B:
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case PWM_D:
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case PWM_F:
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@@ -354,11 +353,11 @@ int pwm_blink_disable(struct aml_pwm_chip *chip, int index)
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case PWM_AO_D:
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mask = 1 << 9;
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val = 0 << 9;
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break;
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default:
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dev_err(aml_chip->chip.dev,
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"blink enable,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_set_reg_bits(&aml_reg->br, mask, val);
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@@ -441,6 +440,7 @@ int pwm_set_blink_times(struct aml_pwm_chip *chip,
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case PWM_AO_C:
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clear_val = 0xf;
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val = value;
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break;
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case PWM_B:
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case PWM_D:
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case PWM_F:
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@@ -453,10 +453,9 @@ int pwm_set_blink_times(struct aml_pwm_chip *chip,
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dev_err(aml_chip->chip.dev,
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"times,index is not legal\n");
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return -EINVAL;
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break;
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}
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pwm_clear_reg_bits(&aml_reg->tr, clear_val);
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pwm_write_reg1(&aml_reg->tr, val);
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pwm_clear_reg_bits(&aml_reg->br, clear_val);
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pwm_write_reg1(&aml_reg->br, val);
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return 0;
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}
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@@ -56,7 +56,7 @@ struct pwm_aml_regs *pwm_id_to_reg
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case PWM_AO_D:
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case PWM_AO_C2:
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case PWM_AO_D2:
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baseaddr = aml_chip->baseaddr.aoab_base;
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baseaddr = aml_chip->baseaddr.aocd_base;
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break;
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default:
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pr_err("unknown pwm id: %d\n", pwm_id);
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@@ -23,10 +23,10 @@
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#define PWM_B 1
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#define PWM_C 2
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#define PWM_D 3
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#define PWM_E 4
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#define PWM_F 5
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#define PWM_AO_A 6
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#define PWM_AO_B 7
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#define PWM_AO_A 4
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#define PWM_AO_B 5
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#define PWM_AO_C 6
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#define PWM_AO_D 7
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/*
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* Addtional 8 channels for gxtvbb , gxl ,gxm and txl
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@@ -35,16 +35,19 @@
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#define PWM_B2 9
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#define PWM_C2 10
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#define PWM_D2 11
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#define PWM_E2 12
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#define PWM_F2 13
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#define PWM_AO_A2 14
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#define PWM_AO_B2 15
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#define PWM_AO_A2 12
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#define PWM_AO_B2 13
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#define PWM_AO_C2 14
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#define PWM_AO_D2 15
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/*add another four channels for txlx*/
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#define PWM_AO_C 16
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#define PWM_AO_D 17
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#define PWM_AO_C2 18
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#define PWM_AO_D2 19
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#define PWM_E 16
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#define PWM_F 17
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#define PWM_E2 18
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#define PWM_F2 19
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#define CLKID_PLL_VID_NOT /*for gxl gxm not support it*/
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@@ -49,24 +49,26 @@ enum pwm_channel {
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PWM_B,
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PWM_C,
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PWM_D,
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PWM_E,
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PWM_F,
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PWM_AO_A,
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PWM_AO_B,
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PWM_AO_C,
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PWM_AO_D,
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PWM_A2,
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PWM_B2,
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PWM_C2,
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PWM_D2,
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PWM_E2,
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PWM_F2,
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PWM_AO_A2,
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PWM_AO_B2,
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/* add another four channels for txlx*/
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PWM_AO_C,
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PWM_AO_D,
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PWM_AO_C2,
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PWM_AO_D2,
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/* add another four channels for txlx*/
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PWM_E,
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PWM_F,
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PWM_E2,
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PWM_F2,
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};
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/*pwm att*/
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