pwm: fix several errors

PD#144476: pwm: fix pwm driver errors

1.change pwm e and f order
2.fix several errors

you can request like this:

	PWM A		0
	PWM B		1
	PWM C		2
	PWM D		3
	PWM AO A	4
	PWM AO B	5
	PWM AO C	6
	PWM AO D	7

Change-Id: Ic1ca7d1f0450db748569447140feab9b9d0c5c34
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
This commit is contained in:
Jian Hu
2017-06-16 16:54:56 +08:00
parent dfe573fb45
commit 488c42edea
5 changed files with 38 additions and 39 deletions

View File

@@ -196,8 +196,6 @@ static int pwm_gxtvbb_enable(struct aml_pwm_chip *aml_chip,
dev_err(aml_chip->chip.dev,
"enable,index is not legal\n");
return -EINVAL;
break;
}
pwm_set_reg_bits(&aml_reg->miscr, val, val);
@@ -244,7 +242,6 @@ static int pwm_meson_enable(struct aml_pwm_chip *aml_chip,
dev_err(aml_chip->chip.dev,
"enable,index is not legal\n");
return -EINVAL;
break;
}
pwm_set_reg_bits(&aml_reg->miscr, val, val);
@@ -303,7 +300,7 @@ static void pwm_aml_disable(struct pwm_chip *chip,
case PWM_AO_A2:
case PWM_AO_C2:
val = 0 << 25;
mask = 25 << 1;
mask = 1 << 25;
break;
case PWM_B2:
case PWM_D2:
@@ -311,7 +308,7 @@ static void pwm_aml_disable(struct pwm_chip *chip,
case PWM_AO_B2:
case PWM_AO_D2:
val = 0 << 24;
mask = 24 << 1;
mask = 1 << 24;
break;
default:
val = 0 << 0;
@@ -456,8 +453,6 @@ static int pwm_meson_config_ext(struct aml_pwm_chip *aml_chip,
dev_err(aml_chip->chip.dev,
"config_ext,index is not legal\n");
return -EINVAL;
break;
}
pwm_set_reg_bits(&aml_reg->miscr, clk_source_mask, clk_source_val);
pwm_set_reg_bits(&aml_reg->miscr, clk_mask, clk_val);
@@ -647,11 +642,11 @@ static int pwm_aml_parse_addr_axg(struct aml_pwm_chip *chip)
if (IS_ERR(chip->baseaddr.cd_base))
return PTR_ERR(chip->baseaddr.cd_base);
chip->baseaddr.aoab_base = of_iomap(np, 3);
chip->baseaddr.aoab_base = of_iomap(np, 2);
if (IS_ERR(chip->baseaddr.aoab_base))
return PTR_ERR(chip->baseaddr.aoab_base);
chip->baseaddr.aocd_base = of_iomap(np, 4);
chip->baseaddr.aocd_base = of_iomap(np, 3);
if (IS_ERR(chip->baseaddr.aocd_base))
return PTR_ERR(chip->baseaddr.aocd_base);

View File

@@ -66,7 +66,6 @@ int pwm_constant_enable(struct aml_pwm_chip *chip, int index)
dev_err(aml_chip->chip.dev,
"enable,index is not legal\n");
return -EINVAL;
break;
}
pwm_set_reg_bits(&aml_reg->miscr, val, val);
@@ -117,8 +116,6 @@ int pwm_constant_disable(struct aml_pwm_chip *chip, int index)
dev_err(aml_chip->chip.dev,
"constant disable,index is not legal\n");
return -EINVAL;
break;
}
pwm_set_reg_bits(&aml_reg->miscr, mask, val);
return 0;
@@ -204,6 +201,7 @@ int pwm_set_times(struct aml_pwm_chip *chip,
case PWM_AO_C:
clear_val = 0xff << 24;
val = value << 24;
break;
case PWM_B:
case PWM_D:
case PWM_F:
@@ -219,6 +217,7 @@ int pwm_set_times(struct aml_pwm_chip *chip,
case PWM_AO_C2:
clear_val = 0xff << 16;
val = value << 16;
break;
case PWM_B2:
case PWM_D2:
case PWM_F2:
@@ -231,8 +230,6 @@ int pwm_set_times(struct aml_pwm_chip *chip,
dev_err(aml_chip->chip.dev,
"times,index is not legal\n");
return -EINVAL;
break;
}
pwm_clear_reg_bits(&aml_reg->tr, clear_val);
pwm_write_reg1(&aml_reg->tr, val);
@@ -302,17 +299,18 @@ int pwm_blink_enable(struct aml_pwm_chip *chip, int index)
case PWM_AO_A:
case PWM_AO_C:
val = 1 << 8;
break;
case PWM_B:
case PWM_D:
case PWM_F:
case PWM_AO_B:
case PWM_AO_D:
val = 1 << 9;
break;
default:
dev_err(aml_chip->chip.dev,
"blink enable,index is not legal\n");
return -EINVAL;
break;
}
pwm_set_reg_bits(&aml_reg->br, val, val);
@@ -347,6 +345,7 @@ int pwm_blink_disable(struct aml_pwm_chip *chip, int index)
case PWM_AO_C:
mask = 1 << 8;
val = 0 << 8;
break;
case PWM_B:
case PWM_D:
case PWM_F:
@@ -354,11 +353,11 @@ int pwm_blink_disable(struct aml_pwm_chip *chip, int index)
case PWM_AO_D:
mask = 1 << 9;
val = 0 << 9;
break;
default:
dev_err(aml_chip->chip.dev,
"blink enable,index is not legal\n");
return -EINVAL;
break;
}
pwm_set_reg_bits(&aml_reg->br, mask, val);
@@ -441,6 +440,7 @@ int pwm_set_blink_times(struct aml_pwm_chip *chip,
case PWM_AO_C:
clear_val = 0xf;
val = value;
break;
case PWM_B:
case PWM_D:
case PWM_F:
@@ -453,10 +453,9 @@ int pwm_set_blink_times(struct aml_pwm_chip *chip,
dev_err(aml_chip->chip.dev,
"times,index is not legal\n");
return -EINVAL;
break;
}
pwm_clear_reg_bits(&aml_reg->tr, clear_val);
pwm_write_reg1(&aml_reg->tr, val);
pwm_clear_reg_bits(&aml_reg->br, clear_val);
pwm_write_reg1(&aml_reg->br, val);
return 0;
}

View File

@@ -56,7 +56,7 @@ struct pwm_aml_regs *pwm_id_to_reg
case PWM_AO_D:
case PWM_AO_C2:
case PWM_AO_D2:
baseaddr = aml_chip->baseaddr.aoab_base;
baseaddr = aml_chip->baseaddr.aocd_base;
break;
default:
pr_err("unknown pwm id: %d\n", pwm_id);

View File

@@ -23,10 +23,10 @@
#define PWM_B 1
#define PWM_C 2
#define PWM_D 3
#define PWM_E 4
#define PWM_F 5
#define PWM_AO_A 6
#define PWM_AO_B 7
#define PWM_AO_A 4
#define PWM_AO_B 5
#define PWM_AO_C 6
#define PWM_AO_D 7
/*
* Addtional 8 channels for gxtvbb , gxl ,gxm and txl
@@ -35,16 +35,19 @@
#define PWM_B2 9
#define PWM_C2 10
#define PWM_D2 11
#define PWM_E2 12
#define PWM_F2 13
#define PWM_AO_A2 14
#define PWM_AO_B2 15
#define PWM_AO_A2 12
#define PWM_AO_B2 13
#define PWM_AO_C2 14
#define PWM_AO_D2 15
/*add another four channels for txlx*/
#define PWM_AO_C 16
#define PWM_AO_D 17
#define PWM_AO_C2 18
#define PWM_AO_D2 19
#define PWM_E 16
#define PWM_F 17
#define PWM_E2 18
#define PWM_F2 19
#define CLKID_PLL_VID_NOT /*for gxl gxm not support it*/

View File

@@ -49,24 +49,26 @@ enum pwm_channel {
PWM_B,
PWM_C,
PWM_D,
PWM_E,
PWM_F,
PWM_AO_A,
PWM_AO_B,
PWM_AO_C,
PWM_AO_D,
PWM_A2,
PWM_B2,
PWM_C2,
PWM_D2,
PWM_E2,
PWM_F2,
PWM_AO_A2,
PWM_AO_B2,
/* add another four channels for txlx*/
PWM_AO_C,
PWM_AO_D,
PWM_AO_C2,
PWM_AO_D2,
/* add another four channels for txlx*/
PWM_E,
PWM_F,
PWM_E2,
PWM_F2,
};
/*pwm att*/