ARM: dts: rv1126: add dsi and dphy node

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I8f35e2e0babe1dc62b52b0c98bcbe0d8f815abc7
This commit is contained in:
Nickey Yang
2020-03-05 15:01:45 +08:00
committed by Tao Huang
parent af8c66c1f5
commit 48ce278196

View File

@@ -634,6 +634,20 @@
<&pmucru CLK_OSC0_DIV32K>;
};
mipi_dphy: mipi-dphy@ff4d0000 {
compatible = "rockchip,rv1126-mipi-dphy", "rockchip,rk1808-mipi-dphy";
reg = <0xff4d0000 0x500>;
clocks = <&cru CLK_MIPIDSIPHY_REF>, <&cru PCLK_DSIPHY>;
clock-names = "ref", "pclk";
clock-output-names = "mipi_dphy_pll";
#clock-cells = <0>;
resets = <&cru SRST_DSIPHY_P>;
reset-names = "apb";
#phy-cells = <0>;
rockchip,grf = <&grf>;
status = "disabled";
};
i2c1: i2c@ff510000 {
compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c";
reg = <0xff510000 0x1000>;
@@ -1071,6 +1085,11 @@
reg = <0>;
remote-endpoint = <&rgb_in_vop>;
};
vop_out_dsi: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi_in_vop>;
};
};
};
@@ -1086,6 +1105,30 @@
status = "disabled";
};
dsi: dsi@ffb30000 {
compatible = "rockchip,rv1126-mipi-dsi";
reg = <0xffb30000 0x500>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_DSIHOST>, <&mipi_dphy>;
clock-names = "pclk", "hs_clk";
resets = <&cru SRST_DSIHOST_P>;
reset-names = "apb";
phys = <&mipi_dphy>;
phy-names = "mipi_dphy";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {
port {
dsi_in_vop: endpoint {
remote-endpoint = <&vop_out_dsi>;
};
};
};
};
rkisp: rkisp@ffb50000 {
compatible = "rockchip,rv1126-rkisp";
reg = <0xffb50000 0x10000>;