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rk: add show cpu and soc interface

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黄涛
2013-04-23 18:58:24 +08:00
parent 0188848a9f
commit 4906177e72
3 changed files with 123 additions and 19 deletions
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1
arch/arm/plat-rk/Makefile
View File

@@ -9,6 +9,7 @@ obj-$(CONFIG_FIQ_DEBUGGER) += rk_fiq_debugger.o
obj-$(CONFIG_RK_EARLY_PRINTK) += early_printk.o ../kernel/debug.o
obj-y += mem_reserve.o
obj-y += config.o
obj-y += cpu.o
obj-y += sram.o
obj-y += iomux.o
obj-$(CONFIG_DDR_TEST) += memtester.o ddr_test.o

68
arch/arm/plat-rk/cpu.c Normal file
View File

@@ -0,0 +1,68 @@
#include <linux/kernel.h>
#include <linux/cpu.h>
#include <plat/cpu.h>
static ssize_t show_type(struct sysdev_class *dev, struct sysdev_class_attribute *attr, char *buf)
{
const char *type;
if (cpu_is_rk3188())
type = "rk3188";
else if (cpu_is_rk3066b())
type = "rk3066b";
else if (cpu_is_rk30xx())
type = "rk30xx";
else if (cpu_is_rk2928())
type = "rk2928";
else
type = "";
return sprintf(buf, "%s\n", type);
}
static SYSDEV_CLASS_ATTR(type, 0444, show_type, NULL);
static ssize_t show_soc(struct sysdev_class *dev, struct sysdev_class_attribute *attr, char *buf)
{
const char *soc;
if (soc_is_rk3188plus())
soc = "rk3188+";
else if (soc_is_rk3188())
soc = "rk3188";
else if (soc_is_rk3168())
soc = "rk3168";
else if (soc_is_rk3028())
soc = "rk3028";
else if (soc_is_rk3066b())
soc = "rk3066b";
else if (soc_is_rk2928g())
soc = "rk2928g";
else if (soc_is_rk2928l())
soc = "rk2928l";
else if (soc_is_rk2926())
soc = "rk2926";
else if (soc_is_rk3066())
soc = "rk3066";
else if (soc_is_rk3068())
soc = "rk3068";
else if (soc_is_rk3000())
soc = "rk3000";
else
soc = "";
return sprintf(buf, "%s\n", soc);
}
static SYSDEV_CLASS_ATTR(soc, 0444, show_soc, NULL);
static int __init rk_cpu_init(void)
{
int err;
err = sysfs_create_file(&cpu_sysdev_class.kset.kobj, &attr_type.attr);
err = sysfs_create_file(&cpu_sysdev_class.kset.kobj, &attr_soc.attr);
return err;
}
late_initcall(rk_cpu_init);

73
arch/arm/plat-rk/include/plat/cpu.h
View File

@@ -24,7 +24,10 @@ static inline bool soc_is_rk2926(void)
{
return ((readl_relaxed(RK2928_GPIO3_BASE + 0x50) & 0x07) == SOC_RK2926);
}
static inline bool cpu_is_rk2928(void) { return true; }
#else
static inline bool cpu_is_rk2928(void) { return false; }
static inline bool soc_is_rk2928g(void) { return false; }
static inline bool soc_is_rk2928l(void) { return false; }
static inline bool soc_is_rk2926(void) { return false; }
@@ -51,40 +54,72 @@ static inline bool cpu_is_rk3066b(void)
&& readl_relaxed(RK30_ROM_BASE + 0x27fc) == 0x56313030);
}
static inline bool cpu_is_rk3188(void)
static inline bool soc_is_rk3066b(void)
{
return cpu_is_rk3066b() && (((readl_relaxed(RK30_GPIO1_BASE + GPIO_EXT_PORT) >> 22) & 3) == 0);
}
static inline bool soc_is_rk3108(void)
{
return cpu_is_rk3066b() && (((readl_relaxed(RK30_GPIO1_BASE + GPIO_EXT_PORT) >> 22) & 3) == 1);
}
static inline bool soc_is_rk3168m(void)
{
return cpu_is_rk3066b() && (((readl_relaxed(RK30_GPIO1_BASE + GPIO_EXT_PORT) >> 22) & 3) == 3);
}
static inline bool soc_is_rk3188(void)
{
return readl_relaxed(RK30_ROM_BASE + 0x27f0) == 0x33313042
&& readl_relaxed(RK30_ROM_BASE + 0x27f4) == 0x32303132
&& readl_relaxed(RK30_ROM_BASE + 0x27f8) == 0x31313330
&& readl_relaxed(RK30_ROM_BASE + 0x27fc) == 0x56313030;
}
static inline bool soc_is_rk3188plus(void)
{
return readl_relaxed(RK30_ROM_BASE + 0x27f0) == 0x33313042
&& readl_relaxed(RK30_ROM_BASE + 0x27f4) == 0x32303133
&& readl_relaxed(RK30_ROM_BASE + 0x27f8) == 0x30313331
&& readl_relaxed(RK30_ROM_BASE + 0x27fc) == 0x56313031;
}
#else
static inline bool cpu_is_rk30xx(void) { return false; }
static inline bool cpu_is_rk3066b(void) { return false; }
static inline bool cpu_is_rk3188(void) { return false; }
#endif
#ifdef CONFIG_ARCH_RK3066B
static inline bool soc_is_rk3066b(void)
{
return (((readl_relaxed(RK30_GPIO1_BASE + GPIO_EXT_PORT) >> 22) & 3) == 0);
}
static inline bool soc_is_rk3108(void)
{
return (((readl_relaxed(RK30_GPIO1_BASE + GPIO_EXT_PORT) >> 22) & 3) == 1);
}
static inline bool soc_is_rk3168m(void)
{
return (((readl_relaxed(RK30_GPIO1_BASE + GPIO_EXT_PORT) >> 22) & 3) == 3);
}
#else
static inline bool soc_is_rk3066b(void) { return false; }
static inline bool soc_is_rk3108(void) { return false; }
static inline bool soc_is_rk3168m(void) { return false; }
static inline bool soc_is_rk3188(void) { return false; }
static inline bool soc_is_rk3188plus(void) { return false; }
#endif
static inline bool cpu_is_rk3188(void)
{
return soc_is_rk3188plus() || soc_is_rk3188();
}
static inline bool soc_is_rk3028(void) { return soc_is_rk3168m(); }
static inline bool soc_is_rk3168(void) { return soc_is_rk3108(); }
#ifdef CONFIG_SOC_RK3000
static inline bool soc_is_rk3000(void) { return true; }
#else
static inline bool soc_is_rk3000(void) { return false; }
#endif
#ifdef CONFIG_SOC_RK3066
static inline bool soc_is_rk3066(void) { return true; }
#else
static inline bool soc_is_rk3066(void) { return false; }
#endif
#ifdef CONFIG_SOC_RK3068
static inline bool soc_is_rk3068(void) { return true; }
#else
static inline bool soc_is_rk3068(void) { return false; }
#endif
#endif