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synced 2026-06-08 11:50:43 +09:00
mmc: host: rk3288-pinctrl: fix sdmmc & sdio0 controller pad iomux setting
rk_sdmmc: setting default pinctrl in controller probe but eMMC.
This commit is contained in:
@@ -820,8 +820,122 @@
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdmmc0_gpio: sdmmc0_gpio{
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rockchip,pins =
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<GPIO6_C4>, //CMD
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<GPIO6_C5>, //CLK
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<GPIO6_C6>, //DET
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<GPIO6_C0>, //D0
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<GPIO6_C1>, //D1
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<GPIO6_C2>, //D2
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<GPIO6_C3>; //D3
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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};
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gpio4_sdio0 {
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sdio0_clk: sdio0_clk {
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rockchip,pins = <SDIO0_CLKOUT>;
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rockchip,pull = <VALUE_PULL_DISABLE>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_cmd: sdio0_cmd {
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rockchip,pins = <SDIO0_CMD>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_dectn: sdio0-dectn{
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rockchip,pins = <SDIO0_DETECTN>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_wrprt: sdio0_wrprt{
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rockchip,pins = <SDIO0_WRPRT>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_pwr: sdio0-pwren{
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rockchip,pins = <SDIO0_PWREN>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_bkpwr: sdio0-bkpwr{
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rockchip,pins = <SDIO0_BKPWR>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_intn: sdio0-intn{
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rockchip,pins = <SDIO0_INTN>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_bus1: sdio0-bus-width1 {
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rockchip,pins = <SDIO0_DATA0>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_bus4: sdio0-bus-width4 {
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rockchip,pins = <SDIO0_DATA0>,
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<SDIO0_DATA1>,
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<SDIO0_DATA2>,
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<SDIO0_DATA3>;
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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sdio0_gpio: sdio0-all-gpio{
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rockchip,pins =
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<GPIO4_D1>, //CLK
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<GPIO4_D0>, //CMD
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<GPIO4_D2>, //DET
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<GPIO4_D3>, //wrprt
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<GPIO4_D4>, //PWREN
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<GPIO4_D5>, //BKPWR
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<GPIO4_D6>, //DO
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<GPIO4_C4>, //D1
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<GPIO4_C5>, //D2
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<GPIO4_C6>, //D3
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<GPIO4_C7>; //INTN
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rockchip,pull = <VALUE_PULL_UP>;
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//rockchip,voltage = <VALUE_VOL_DEFAULT>;
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rockchip,drive = <VALUE_DRV_DEFAULT>;
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//rockchip,tristate = <VALUE_TRI_DEFAULT>;
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};
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};
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gpio2_gps {
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gps_mag:gps-mag {
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rockchip,pins = <GPS_MAG>;
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@@ -271,39 +271,41 @@
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};
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sdmmc: rksdmmc@ff0c0000 {
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compatible = "rockchip,rk_mmc";
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compatible = "rockchip,rk_mmc";
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reg = <0xff0c0000 0x4000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; /*irq=64*/
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#address-cells = <1>;
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#size-cells = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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//pinctrl-names = "default","suspend";
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//pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
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//pinctrl-1 = <&sd0_cd_gpio>; //for int gpio?
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pinctrl-names = "default","idle";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
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pinctrl-1 = <&sdmmc0_gpio>;
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clocks = <&clk_sdmmc>, <&clk_gates8 3>;
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clock-names = "clk_mmc", "hclk_mmc";
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num-slots = <1>;
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fifo-depth = <0x100>;
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bus-width = <4>;
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num-slots = <1>;
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fifo-depth = <0x100>;
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bus-width = <4>;
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};
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sdio: rksdmmc@ff0d0000 {
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compatible = "rockchip,rk_mmc";
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reg = <0xff0d0000 0x4000>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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//pinctrl-names = "default","suspend";
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//pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>;
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reg = <0xff0d0000 0x4000>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default","idle";
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pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_dectn &sdio0_wrprt &sdio0_pwr &sdio0_bkpwr
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&sdio0_intn &sdio0_bus4>;
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pinctrl-1 = <&sdio0_gpio>;
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clocks = <&clk_sdio0>, <&clk_gates8 4>;
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clock-names = "clk_mmc", "hclk_mmc";
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num-slots = <1>;
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num-slots = <1>;
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fifo-depth = <0x100>;
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bus-width = <4>;
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fifo-depth = <0x100>;
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bus-width = <4>;
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};
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sdio1: rksdmmc@ff0e0000 {
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@@ -727,7 +727,8 @@ static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data)
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if (host->prev_blksz != data->blksz)
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dw_mci_adjust_fifoth(host, data);
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temp = mci_readl(host, CTRL);
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/* Reset DMA FIFO*/
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temp = mci_readl(host, CTRL);
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temp |= (SDMMC_CTRL_DMA_RESET | SDMMC_CTRL_FIFO_RESET);
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mci_writel(host, CTRL, temp);
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@@ -756,6 +757,11 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data)
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host->sg = NULL;
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host->data = data;
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/* Reset FIFO*/
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temp = mci_readl(host, CTRL);
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temp |= (SDMMC_CTRL_DMA_RESET | SDMMC_CTRL_FIFO_RESET);
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mci_writel(host, CTRL, temp);
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if (data->flags & MMC_DATA_READ) {
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host->dir_status = DW_MCI_RECV_STATUS;
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dw_mci_ctrl_rd_thld(host, data);
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@@ -2649,6 +2655,19 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
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ret = mmc_add_host(mmc);
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if (ret)
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goto err_setup_bus;
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/* Pinctrl set default iomux state to fucntion port.
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* Fixme: DON'T TOUCH EMMC SETTING!
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*/
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if(!(host->mmc->restrict_caps & RESTRICT_CARD_TYPE_EMMC))
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{
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host->pinctrl = devm_pinctrl_get(host->dev);
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host->pins_default = pinctrl_lookup_state(host->pinctrl,PINCTRL_STATE_DEFAULT);
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if(!host->pins_default)
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pinctrl_select_state(host->pinctrl, host->pins_default);
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else
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printk("%s: Warning : No default pinctrl matched!\n",mmc_hostname(host->mmc));
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}
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#if defined(CONFIG_DEBUG_FS)
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dw_mci_init_debugfs(slot);
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@@ -195,6 +195,10 @@ struct dw_mci {
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struct regulator *vmmc; /* Power regulator */
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unsigned long irq_flags; /* IRQ flags */
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int irq;
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struct pinctrl *pinctrl; /*Pinctrl state*/
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struct pinctrl_state *pins_default;
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struct pinctrl_state *pins_idle;
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struct pinctrl_state *pins_sleep;
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};
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/* DMA ops for Internal/External DMAC interface */
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