drm/rockchip: vop2: Set wb_axi_yrgb/uv id

Set wb_axi_yrgb_id to 0xd
set wb_axi_uv_id to 0xe

Change-Id: Ie8188c2c307d2167ea237b4a176b03cfdab73792
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This commit is contained in:
Andy Yan
2021-01-21 11:34:32 +08:00
committed by Tao Huang
parent 38db9d9604
commit 49eae01a53
3 changed files with 9 additions and 0 deletions

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@@ -613,6 +613,8 @@ struct vop2_wb_regs {
struct vop_reg scale_x_factor;
struct vop_reg scale_x_en;
struct vop_reg scale_y_en;
struct vop_reg axi_yrgb_id;
struct vop_reg axi_uv_id;
};
struct vop_win_data {

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@@ -2076,6 +2076,7 @@ static void vop2_initial(struct drm_crtc *crtc)
struct vop2_video_port *vp = to_vop2_video_port(crtc);
struct vop2 *vop2 = vp->vop2;
uint32_t current_vp_id = vp->id;
struct vop2_wb *wb = &vop2->wb;
int ret;
if (vop2->enable_count == 0) {
@@ -2094,6 +2095,10 @@ static void vop2_initial(struct drm_crtc *crtc)
memcpy(vop2->regsbak, vop2->regs, vop2->len);
VOP_MODULE_SET(vop2, wb, axi_yrgb_id, 0xd);
VOP_MODULE_SET(vop2, wb, axi_uv_id, 0xe);
vop2_wb_cfg_done(vop2);
VOP_CTRL_SET(vop2, cfg_done_en, 1);
/*
* Disable auto gating, this is a workaround to

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@@ -410,6 +410,8 @@ static const struct vop2_wb_regs rk3568_vop_wb_regs = {
.r2y_en = VOP_REG(RK3568_WB_CTRL, 0x1, 5),
.scale_x_en = VOP_REG(RK3568_WB_CTRL, 0x1, 7),
.scale_y_en = VOP_REG(RK3568_WB_CTRL, 0x1, 8),
.axi_yrgb_id = VOP_REG(RK3568_WB_CTRL, 0xff, 19),
.axi_uv_id = VOP_REG(RK3568_WB_CTRL, 0x1f, 27),
.scale_x_factor = VOP_REG(RK3568_WB_XSCAL_FACTOR, 0x3fff, 16),
.yrgb_mst = VOP_REG(RK3568_WB_YRGB_MST, 0xffffffff, 0),
.uv_mst = VOP_REG(RK3568_WB_CBR_MST, 0xffffffff, 0),