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[ARM] tegra: stingray: change UARTC clock source to PLL_P

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Bluetooth requires 3Mpbs baud rate. Change UART clock source from
clk_m (26000000) to pll_p (216000000).

Signed-off-by: Jay Cheng <jacheng@nvidia.com>
This commit is contained in:
Jay Cheng
2010-08-06 18:42:33 -04:00
committed by Colin Cross
parent 539795fb38
commit 4a7c8dd336
1 changed files with 1 additions and 0 deletions
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arch/arm/mach-tegra/board-stingray.c
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@@ -587,6 +587,7 @@ static struct tegra_i2c_platform_data stingray_i2c4_platform_data = {
static __initdata struct tegra_clk_init_table stingray_clk_init_table[] = {
/* name parent rate enabled */
{ "uartb", "clk_m", 26000000, true},
{ "uartc", "pll_p", 216000000, false},
/*{ "emc", "pll_p", 0, true},
{ "pll_m", NULL, 600000000, true},
{ "emc", "pll_m", 600000000, false},*/