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clk: rockchip: rk3308: Fix input rate of vop frac clock

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Change-Id: Iec4e8464cb05b35c2a9493fc4907ef9b9946899e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This commit is contained in:
Finley Xiao
2019-09-03 20:36:41 +08:00
committed by Elaine Zhang
parent 82c191700f
commit 4a9e89e94a
1 changed files with 3 additions and 3 deletions
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6
drivers/clk/rockchip/clk-rk3308.c
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@@ -1011,11 +1011,11 @@ static void __init rk3308_clk_init(struct device_node *np)
rockchip_clk_register_branches(ctx, rk3308_clk_branches,
ARRAY_SIZE(rk3308_clk_branches));
if (soc_is_rk3308b())
rockchip_clk_register_branches(ctx, rk3308_dclk_vop_frac,
ARRAY_SIZE(rk3308_dclk_vop_frac));
else
rockchip_clk_register_branches(ctx, rk3308b_dclk_vop_frac,
ARRAY_SIZE(rk3308b_dclk_vop_frac));
else
rockchip_clk_register_branches(ctx, rk3308_dclk_vop_frac,
ARRAY_SIZE(rk3308_dclk_vop_frac));
rockchip_clk_protect_critical(rk3308_critical_clocks,
ARRAY_SIZE(rk3308_critical_clocks));