staging: comedi: dmm32at: rename DMM32AT_AISTAT

For aesthetics, rename this define used for the A/D Status register. Also,
rename the defines for the bits of the register.

The probe code in dmm32at_reset() checks this register to make sure the
S/D1 and S/D0 bits are set. This check actually verifies that the board is
configured (with jumpers on the board) with all the Analog Input channels
operating in single-ended mode. Add a comment about this.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
2014-11-11 16:55:40 -07:00
committed by Greg Kroah-Hartman
parent d900a48841
commit 4b82531e27

View File

@@ -80,7 +80,11 @@ Configuration Options:
#define DMM32AT_CTRL_PAGE_8254 (0 << 0)
#define DMM32AT_CTRL_PAGE_8255 (1 << 0)
#define DMM32AT_CTRL_PAGE_CALIB (3 << 0)
#define DMM32AT_AISTAT 0x08
#define DMM32AT_AI_STATUS_REG 0x08
#define DMM32AT_AI_STATUS_STS (1 << 7)
#define DMM32AT_AI_STATUS_SD1 (1 << 6)
#define DMM32AT_AI_STATUS_SD0 (1 << 5)
#define DMM32AT_AI_STATUS_ADCH_MASK (0x1f << 0)
#define DMM32AT_INTCLOCK 0x09
@@ -97,9 +101,6 @@ Configuration Options:
/* Board register values. */
/* DMM32AT_AISTAT 0x08 */
#define DMM32AT_STATUS 0x80
/* DMM32AT_INTCLOCK 0x09 */
#define DMM32AT_ADINT 0x80
#define DMM32AT_CLKSEL 0x03
@@ -190,7 +191,7 @@ static int dmm32at_ai_status(struct comedi_device *dev,
unsigned char status;
status = inb(dev->iobase + context);
if ((status & DMM32AT_STATUS) == 0)
if ((status & DMM32AT_AI_STATUS_STS) == 0)
return 0;
return -EBUSY;
}
@@ -214,7 +215,7 @@ static int dmm32at_ai_insn_read(struct comedi_device *dev,
outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG);
ret = comedi_timeout(dev, s, insn, dmm32at_ai_status,
DMM32AT_AISTAT);
DMM32AT_AI_STATUS_REG);
if (ret)
return ret;
@@ -514,13 +515,19 @@ static int dmm32at_reset(struct comedi_device *dev)
ailo = inb(dev->iobase + DMM32AT_AI_LO_CHAN_REG);
aihi = inb(dev->iobase + DMM32AT_AI_HI_CHAN_REG);
fifostat = inb(dev->iobase + DMM32AT_FIFO_STATUS_REG);
aistat = inb(dev->iobase + DMM32AT_AISTAT);
aistat = inb(dev->iobase + DMM32AT_AI_STATUS_REG);
intstat = inb(dev->iobase + DMM32AT_INTCLOCK);
airback = inb(dev->iobase + DMM32AT_AIRBACK);
/*
* NOTE: The (DMM32AT_AI_STATUS_SD1 | DMM32AT_AI_STATUS_SD0)
* test makes this driver only work if the board is configured
* with all A/D channels set for single-ended operation.
*/
if (ailo != 0x00 || aihi != 0x1f ||
fifostat != DMM32AT_FIFO_STATUS_EF ||
aistat != 0x60 || intstat != 0x00 || airback != 0x0c)
aistat != (DMM32AT_AI_STATUS_SD1 | DMM32AT_AI_STATUS_SD0) ||
intstat != 0x00 || airback != 0x0c)
return -EIO;
return 0;