mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-08 03:40:35 +09:00
USB: Enable USB clk.
This commit is contained in:
@@ -896,8 +896,8 @@
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"host1_linestate";
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gpios = <&gpio0 GPIO_B6 GPIO_ACTIVE_LOW>,/*HOST_VBUS_DRV*/
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<&gpio0 GPIO_B4 GPIO_ACTIVE_LOW>;/*OTG_VBUS_DRV*/
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/*clocks = <&clk_gates7 9>;*/
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/*clock-names = "hclk_usb_peri";*/
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clocks = <&clk_gates7 9>;
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clock-names = "hclk_usb_peri";
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rockchip,remote_wakeup;
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rockchip,usb_irq_wakeup;
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@@ -919,8 +919,8 @@
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compatible = "rockchip,rk3288_usb20_otg";
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reg = <0xff580000 0x40000>;
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interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
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/*clocks = <&clk_gates13 4>, <&clk_gates7 4>;*/
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/*clock-names = "clk_usbphy0", "hclk_usb0";*/
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clocks = <&clk_gates13 4>, <&clk_gates7 4>;
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clock-names = "clk_usbphy0", "hclk_usb0";
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/*0 - Normal, 1 - Force Host, 2 - Force Device*/
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rockchip,usb-mode = <0>;
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};
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@@ -929,36 +929,36 @@
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compatible = "rockchip,rk3288_usb20_host";
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reg = <0xff540000 0x40000>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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/*clocks = <&clk_gates13 6>, <&clk_gates7 7>;*/
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/*clock-names = "clk_usbphy1", "hclk_usb1";*/
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clocks = <&clk_gates13 6>, <&clk_gates7 7>;
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clock-names = "clk_usbphy1", "hclk_usb1";
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};
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usb2: usb@ff500000 {
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compatible = "rockchip,rk3288_rk_ehci_host";
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reg = <0xff500000 0x20000>;
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
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/*clocks = <&clk_gates13 5>, <&clk_gates7 6>;*/
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/*clock-names = "clk_usbphy2", "hclk_usb2";*/
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clocks = <&clk_gates13 5>, <&clk_gates7 6>;
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clock-names = "clk_usbphy2", "hclk_usb2";
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};
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usb3: usb@ff520000 {
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compatible = "rockchip,rk3288_rk_ohci_host";
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reg = <0xff520000 0x20000>;
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interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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/*clocks = <&clk_gates13 5>, <&clk_gates7 6>;*/
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/*clock-names = "clk_usbphy3", "hclk_usb3";*/
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clocks = <&clk_gates13 5>, <&clk_gates7 6>;
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clock-names = "clk_usbphy3", "hclk_usb3";
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};
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hsic: hsic@ff5c0000 {
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compatible = "rockchip,rk3288_rk_hsic_host";
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reg = <0xff5c0000 0x40000>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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/*clocks = <&hsicphy_480m>, <&clk_gates7 8>,*/
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/* <&hsicphy_12m>, <&clk_otgphy1_480m>,*/
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/* <&clk_otgphy2_480m>;*/
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/*clock-names = "hsicphy_480m", "hclk_hsic",*/
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/* "hsicphy_12m", "hsic_usbphy1",*/
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/* "hsic_usbphy2";*/
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clocks = <&hsicphy_480m>, <&clk_gates7 8>,
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<&hsicphy_12m>, <&usbphy_480m>,
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<&otgphy1_480m>, <&otgphy2_480m>;
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clock-names = "hsicphy_480m", "hclk_hsic",
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"hsicphy_12m", "usbphy_480m",
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"hsic_usbphy1", "hsic_usbphy2";
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};
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gmac: eth@ff290000 {
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@@ -47,7 +47,6 @@ static void usb20otg_soft_reset(void)
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static void usb20otg_clock_init(void* pdata)
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{
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/*
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struct dwc_otg_platform_data *usbpdata=pdata;
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struct clk* ahbclk,*phyclk;
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@@ -65,12 +64,10 @@ static void usb20otg_clock_init(void* pdata)
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usbpdata->phyclk = phyclk;
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usbpdata->ahbclk = ahbclk;
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*/
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}
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static void usb20otg_clock_enable(void* pdata, int enable)
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{
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/*
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struct dwc_otg_platform_data *usbpdata=pdata;
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if(enable){
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@@ -79,7 +76,7 @@ static void usb20otg_clock_enable(void* pdata, int enable)
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}else{
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clk_disable_unprepare(usbpdata->ahbclk);
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clk_disable_unprepare(usbpdata->phyclk);
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}*/
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}
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}
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static int usb20otg_get_status(int id)
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@@ -195,7 +192,6 @@ static void usb20host_soft_reset(void)
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static void usb20host_clock_init(void* pdata)
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{
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/*
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struct dwc_otg_platform_data *usbpdata=pdata;
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struct clk* ahbclk,*phyclk;
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@@ -213,12 +209,10 @@ static void usb20host_clock_init(void* pdata)
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usbpdata->phyclk = phyclk;
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usbpdata->ahbclk = ahbclk;
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*/
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}
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static void usb20host_clock_enable(void* pdata, int enable)
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{
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/*
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struct dwc_otg_platform_data *usbpdata=pdata;
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if(enable){
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@@ -228,7 +222,6 @@ static void usb20host_clock_enable(void* pdata, int enable)
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clk_disable_unprepare(usbpdata->ahbclk);
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clk_disable_unprepare(usbpdata->phyclk);
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}
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*/
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}
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static int usb20host_get_status(int id)
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@@ -315,9 +308,9 @@ static void rk_hsic_clock_init(void* pdata)
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* rk3188 must use host phy 480MHz clk, because if otg bypass
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* to uart mode, otg phy 480MHz clk will be closed automatically
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*/
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/*
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struct rkehci_platform_data *usbpdata=pdata;
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struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic, *phyclk_usbphy1;
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struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic;
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struct clk *phyclk_480m, *phyclk480m_parent;
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phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
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if (IS_ERR(phyclk480m_hsic)) {
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@@ -331,29 +324,33 @@ static void rk_hsic_clock_init(void* pdata)
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return;
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}
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phyclk_usbphy1 = devm_clk_get(usbpdata->dev, "hsic_usbphy2");
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if (IS_ERR(phyclk_usbphy1)) {
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phyclk480m_parent = devm_clk_get(usbpdata->dev, "hsic_usbphy2");
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if (IS_ERR(phyclk480m_parent)) {
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dev_err(usbpdata->dev, "Failed to get hsic_usbphy2\n");
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return;
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}
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phyclk_480m = devm_clk_get(usbpdata->dev, "usbphy_480m");
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if (IS_ERR(phyclk_480m)) {
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dev_err(usbpdata->dev, "Failed to get usbphy_480m\n");
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return;
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}
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ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
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if (IS_ERR(ahbclk)) {
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dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
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return;
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}
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clk_set_parent(phyclk480m_hsic, phyclk_usbphy1);
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clk_set_parent(phyclk_480m, phyclk480m_parent);
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usbpdata->hclk_hsic = ahbclk;
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usbpdata->hsic_phy_480m = phyclk480m_hsic;
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usbpdata->hsic_phy_12m = phyclk12m_hsic;
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*/
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}
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static void rk_hsic_clock_enable(void* pdata, int enable)
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{
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/*
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struct rkehci_platform_data *usbpdata=pdata;
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if(enable == usbpdata->clk_status)
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@@ -369,7 +366,6 @@ static void rk_hsic_clock_enable(void* pdata, int enable)
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clk_disable_unprepare(usbpdata->hsic_phy_12m);
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usbpdata->clk_status = 0;
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}
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*/
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}
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static void rk_hsic_soft_reset(void)
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@@ -401,7 +397,6 @@ static void rk_ehci_hw_init(void)
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static void rk_ehci_clock_init(void* pdata)
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{
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/*
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struct rkehci_platform_data *usbpdata=pdata;
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struct clk* ahbclk,*phyclk;
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@@ -419,12 +414,10 @@ static void rk_ehci_clock_init(void* pdata)
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usbpdata->phyclk = phyclk;
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usbpdata->ahbclk = ahbclk;
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*/
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}
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static void rk_ehci_clock_enable(void* pdata, int enable)
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{
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/*
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struct rkehci_platform_data *usbpdata=pdata;
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if(enable == usbpdata->clk_status)
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@@ -438,7 +431,6 @@ static void rk_ehci_clock_enable(void* pdata, int enable)
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clk_disable_unprepare(usbpdata->phyclk);
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usbpdata->clk_status = 0;
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}
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*/
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}
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static void rk_ehci_soft_reset(void)
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@@ -470,7 +462,6 @@ static void rk_ohci_hw_init(void)
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static void rk_ohci_clock_init(void* pdata)
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{
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/*
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struct rkehci_platform_data *usbpdata=pdata;
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struct clk* ahbclk,*phyclk;
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@@ -488,12 +479,10 @@ static void rk_ohci_clock_init(void* pdata)
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usbpdata->phyclk = phyclk;
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usbpdata->ahbclk = ahbclk;
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*/
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}
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static void rk_ohci_clock_enable(void* pdata, int enable)
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{
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/*
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struct rkehci_platform_data *usbpdata=pdata;
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if(enable == usbpdata->clk_status)
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@@ -507,7 +496,6 @@ static void rk_ohci_clock_enable(void* pdata, int enable)
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clk_disable_unprepare(usbpdata->phyclk);
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usbpdata->clk_status = 0;
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}
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*/
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}
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static void rk_ohci_soft_reset(void)
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@@ -821,7 +809,7 @@ static int dwc_otg_control_usb_probe(struct platform_device *pdev)
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{
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int gpio, err;
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struct device_node *np = pdev->dev.of_node;
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// struct clk* hclk_usb_peri;
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struct clk* hclk_usb_peri;
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int ret = 0;
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control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
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@@ -838,7 +826,6 @@ static int dwc_otg_control_usb_probe(struct platform_device *pdev)
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"rockchip,usb_irq_wakeup");
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INIT_DELAYED_WORK(&control_usb->usb_charger_det_work, usb_battery_charger_detect_work);
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/* disable for debug
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hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
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if (IS_ERR(hclk_usb_peri)) {
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dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
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@@ -848,7 +835,6 @@ static int dwc_otg_control_usb_probe(struct platform_device *pdev)
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control_usb->hclk_usb_peri = hclk_usb_peri;
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clk_prepare_enable(hclk_usb_peri);
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*/
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ret = usb_grf_ioremap(pdev);
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if(ret){
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dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
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@@ -915,16 +901,14 @@ static int dwc_otg_control_usb_probe(struct platform_device *pdev)
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return 0;
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err2:
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// disable for debug
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// clk_disable_unprepare(hclk_usb_peri);
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clk_disable_unprepare(hclk_usb_peri);
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err1:
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return ret;
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}
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static int dwc_otg_control_usb_remove(struct platform_device *pdev)
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{
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// disable for debug
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// clk_disable_unprepare(control_usb->hclk_usb_peri);
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clk_disable_unprepare(control_usb->hclk_usb_peri);
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return 0;
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}
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