video: rockchip: rga3: RGA2 support YUV HDS/VDS

Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I03f909f4d52bb8c5bd6c0607064f9075a4865cd7
This commit is contained in:
Yu Qiaowei
2022-02-23 17:57:18 +08:00
committed by Tao Huang
parent 06622a5859
commit 4bb8b324f2
2 changed files with 19 additions and 1 deletions

View File

@@ -489,7 +489,10 @@ struct rga_req {
/* RGA2 1106 add */
struct rga_mosaic_info mosaic_info;
uint8_t reservr[125];
uint8_t uvhds_mode;
uint8_t uvvds_mode;
uint8_t reservr[123];
};
struct rga2_req {
@@ -626,6 +629,9 @@ struct rga2_req {
struct rga_mosaic_info mosaic_info;
uint8_t yin_yout_en;
uint8_t uvhds_mode;
uint8_t uvvds_mode;
};
struct rga3_req {

View File

@@ -281,6 +281,10 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg)
if (msg->rotate_mode >> 6)
scale_h_flag = 3;
}
/* uvvds need to force tile mode. */
if (msg->uvvds_mode && scale_w_flag == 0)
scale_w_flag = 3;
}
switch (msg->src.format) {
@@ -1040,6 +1044,11 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
(s_RGA2_DST_INFO_SW_SRC1_CSC_CLIP_MODE(
msg->yuv2rgb_mode >> 7)));
reg = ((reg & (~m_RGA2_DST_INFO_SW_DST_UVHDS_MODE)) |
(s_RGA2_DST_INFO_SW_DST_UVHDS_MODE(msg->uvhds_mode)));
reg = ((reg & (~m_RGA2_DST_INFO_SW_DST_UVVDS_MODE)) |
(s_RGA2_DST_INFO_SW_DST_UVVDS_MODE(msg->uvvds_mode)));
ydither_en = (msg->dst.format == RGA_FORMAT_Y4)
&& ((msg->alpha_rop_flag >> 6) & 0x1);
@@ -1837,6 +1846,9 @@ static void rga_cmd_to_rga2_cmd(struct rga_scheduler_t *scheduler,
rga_is_only_y_format(req->dst.format))
req->yin_yout_en = true;
req->uvhds_mode = req_rga->uvhds_mode;
req->uvvds_mode = req_rga->uvvds_mode;
if (((req_rga->alpha_rop_flag) & 1)) {
if ((req_rga->alpha_rop_flag >> 3) & 1) {
/* porter duff alpha enable */