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i2c: cadence: Fix the hold bit setting
[ Upstream commitd358def706] In case the hold bit is not needed we are carrying the old values. Fix the same by resetting the bit when not needed. Fixes the sporadic i2c bus lockups on National Instruments Zynq-based devices. Fixes:df8eb5691c("i2c: Add driver for Cadence I2C controller") Reported-by: Kyle Roeschley <kyle.roeschley@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Tested-by: Kyle Roeschley <kyle.roeschley@ni.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
e5f4a0bb79
commit
4bd491fd4c
@@ -382,8 +382,10 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id)
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* Check for the message size against FIFO depth and set the
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* 'hold bus' bit if it is greater than FIFO depth.
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*/
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if (id->recv_count > CDNS_I2C_FIFO_DEPTH)
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if ((id->recv_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag)
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ctrl_reg |= CDNS_I2C_CR_HOLD;
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else
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ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD;
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cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
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@@ -440,8 +442,11 @@ static void cdns_i2c_msend(struct cdns_i2c *id)
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* Check for the message size against FIFO depth and set the
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* 'hold bus' bit if it is greater than FIFO depth.
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*/
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if (id->send_count > CDNS_I2C_FIFO_DEPTH)
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if ((id->send_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag)
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ctrl_reg |= CDNS_I2C_CR_HOLD;
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else
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ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD;
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cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
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/* Clear the interrupts in interrupt status register. */
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