shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 02:50:49 +09:00
Code Issues Packages Projects Releases Wiki Activity

video: rockchip: rga3: add full_csc clip config

Browse Source 
Change-Id: I197b68977ab7be01837967b2b85596e897cd4d99
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
This commit is contained in:
Yu Qiaowei
2023-08-31 18:24:54 +08:00
committed by Tao Huang
parent de4171ded6
commit 4beff868e2
3 changed files with 36 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/video/rockchip/rga3/include/rga.h
View File

@@ -380,6 +380,16 @@ struct rga_full_csc {
struct rga_csc_coe coe_v;
};
struct rga_csc_range {
uint16_t max;
uint16_t min;
};
struct rga_csc_clip {
struct rga_csc_range y;
struct rga_csc_range uv;
};
struct rga_mosaic_info {
uint8_t enable;
uint8_t mode;
@@ -680,9 +690,12 @@ struct rga_req {
struct {
uint32_t global_alpha_en:1;
uint32_t full_csc_clip_en:1;
} feature;
uint8_t reservr[51];
struct rga_csc_clip full_csc_clip;
uint8_t reservr[43];
};
struct rga_alpha_config {

1
drivers/video/rockchip/rga3/include/rga_drv.h
View File

@@ -272,6 +272,7 @@ struct rga_job {
struct rga_req rga_command_base;
uint32_t cmd_reg[32 * 8];
struct rga_full_csc full_csc;
struct rga_csc_clip full_csc_clip;
struct rga_pre_intr_info pre_intr_info;
struct rga_job_buffer src_buffer;

32
drivers/video/rockchip/rga3/rga2_reg_info.c
View File

@@ -2333,8 +2333,24 @@ static int rga2_init_reg(struct rga_job *job)
memset(&req, 0x0, sizeof(req));
rga_cmd_to_rga2_cmd(scheduler, &job->rga_command_base, &req);
if (req.full_csc_en)
if (req.full_csc_en) {
memcpy(&job->full_csc, &job->rga_command_base.full_csc, sizeof(job->full_csc));
if (job->rga_command_base.feature.full_csc_clip_en) {
memcpy(&job->full_csc_clip, &job->rga_command_base.full_csc_clip,
sizeof(job->full_csc_clip));
} else {
job->full_csc_clip.y.max = 0xff;
job->full_csc_clip.y.min = 0x0;
job->full_csc_clip.uv.max = 0xff;
job->full_csc_clip.uv.min = 0x0;
}
} else {
job->full_csc_clip.y.max = 0xff;
job->full_csc_clip.y.min = 0x0;
job->full_csc_clip.uv.max = 0xff;
job->full_csc_clip.uv.min = 0x0;
}
memcpy(&job->pre_intr_info, &job->rga_command_base.pre_intr_info,
sizeof(job->pre_intr_info));
@@ -2485,19 +2501,13 @@ static void rga2_set_pre_intr_reg(struct rga_job *job, struct rga_scheduler_t *s
static void rga2_set_reg_full_csc(struct rga_job *job, struct rga_scheduler_t *scheduler)
{
uint8_t clip_y_max, clip_y_min;
uint8_t clip_uv_max, clip_uv_min;
clip_y_max = 0xff;
clip_y_min = 0x0;
clip_uv_max = 0xff;
clip_uv_min = 0;
/* full csc coefficient */
/* Y coefficient */
rga_write(job->full_csc.coe_y.r_v | (clip_y_max << 16) | (clip_y_min << 24),
rga_write(job->full_csc.coe_y.r_v |
(job->full_csc_clip.y.max << 16) | (job->full_csc_clip.y.min << 24),
RGA2_DST_CSC_00, scheduler);
rga_write(job->full_csc.coe_y.g_y | (clip_uv_max << 16) | (clip_uv_min << 24),
rga_write(job->full_csc.coe_y.g_y |
(job->full_csc_clip.uv.max << 16) | (job->full_csc_clip.uv.min << 24),
RGA2_DST_CSC_01, scheduler);
rga_write(job->full_csc.coe_y.b_u, RGA2_DST_CSC_02, scheduler);
rga_write(job->full_csc.coe_y.off, RGA2_DST_CSC_OFF0, scheduler);