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soc: rockchip: rk_fiq_debugger: fix interrupt fires forever
Fix bug that RX TIMEOUT interrupt fires forever. Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Change-Id: I98062debaf549ccbd8e3bda84a396e59588c8309
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@@ -45,14 +45,14 @@
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#ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
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#include <linux/rockchip/rockchip_sip.h>
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#endif
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#define UART_USR 0x1f /* In: UART Status Register */
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#define UART_USR 0x1f /* In: UART Status Register */
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#define UART_USR_RX_FIFO_FULL 0x10 /* Receive FIFO full */
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#define UART_USR_RX_FIFO_NOT_EMPTY 0x08 /* Receive FIFO not empty */
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#define UART_USR_TX_FIFO_EMPTY 0x04 /* Transmit FIFO empty */
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#define UART_USR_TX_FIFO_NOT_FULL 0x02 /* Transmit FIFO not full */
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#define UART_USR_BUSY 0x01 /* UART busy indicator */
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#define UART_SRR 0x22 /* software reset register */
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#define RK_UART_RFL 0x21 /* UART Receive Fifo Level Register */
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struct rk_fiq_debugger {
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int irq;
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@@ -150,7 +150,7 @@ static int debug_port_init(struct platform_device *pdev)
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static int debug_getc(struct platform_device *pdev)
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{
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unsigned int lsr;
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unsigned int lsr, usr, rfl, iir;
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struct rk_fiq_debugger *t;
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unsigned int temp;
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static unsigned int n;
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@@ -160,9 +160,23 @@ static int debug_getc(struct platform_device *pdev)
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/*
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* Clear uart interrupt status
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*/
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rk_fiq_read(t, UART_USR);
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iir = rk_fiq_read(t, UART_IIR);
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usr = rk_fiq_read(t, UART_USR);
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lsr = rk_fiq_read_lsr(t);
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/*
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* There are ways to get Designware-based UARTs into a state where
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* they are asserting UART_IIR_RX_TIMEOUT but there is no actual
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* data available. If we see such a case then we'll do a bogus
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* read. If we don't do this then the "RX TIMEOUT" interrupt will
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* fire forever.
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*/
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if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT) {
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rfl = rk_fiq_read(t, RK_UART_RFL);
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if (!(lsr & (UART_LSR_DR | UART_LSR_BI)) && !(usr & 0x1) && (rfl == 0))
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rk_fiq_read(t, UART_RX);
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}
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if (lsr & UART_LSR_DR) {
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temp = rk_fiq_read(t, UART_RX);
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buf[n & 0x1f] = temp;
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