arm64: dts: rockchip: Add rk3576-cpu-swap.dtsi

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I22bdf4a116f8324513193c5057883066c28c054c
This commit is contained in:
Tao Huang
2024-03-05 18:59:19 +08:00
parent 6ff03d2d70
commit 4d91117006

View File

@@ -0,0 +1,59 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*/
/delete-node/ &cpu_l0;
/delete-node/ &cpu_l1;
/delete-node/ &cpu_l2;
/delete-node/ &cpu_l3;
/ {
cpus {
cpu_l0: cpu@000 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
enable-method = "psci";
capacity-dmips-mhz = <485>;
clocks = <&scmi_clk ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
#cooling-cells = <2>;
dynamic-power-coefficient = <120>;
cpu-idle-states = <&CPU_SLEEP>;
};
cpu_l1: cpu@001 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
enable-method = "psci";
capacity-dmips-mhz = <485>;
clocks = <&scmi_clk ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
};
cpu_l2: cpu@002 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x2>;
enable-method = "psci";
capacity-dmips-mhz = <485>;
clocks = <&scmi_clk ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
};
cpu_l3: cpu@003 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x3>;
enable-method = "psci";
capacity-dmips-mhz = <485>;
clocks = <&scmi_clk ARMCLK_L>;
operating-points-v2 = <&cluster0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
};
};
};