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clk: imx: fracn-gppll: fix fractional part of PLL getting lost

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[ Upstream commit 7622f888fca125ae46f695edf918798ebc0506c5 ]

Fractional part of PLL gets lost after re-enabling the PLL. the
MFN can NOT be automatically loaded when doing frac PLL enable/disable,
So when re-enable PLL, configure mfn explicitly.

Fixes: 1b26cb8a77 ("clk: imx: support fracn gppll")
Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240607133347.3291040-5-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Pengfei Li
2024-06-07 21:33:36 +08:00
committed by Greg Kroah-Hartman
parent ddfa237e64
commit 4ea3592cf0
1 changed files with 4 additions and 0 deletions
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4
drivers/clk/imx/clk-fracn-gppll.c
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@@ -289,6 +289,10 @@ static int clk_fracn_gppll_prepare(struct clk_hw *hw)
if (val & POWERUP_MASK)
return 0;
if (pll->flags & CLK_FRACN_GPPLL_FRACN)
writel_relaxed(readl_relaxed(pll->base + PLL_NUMERATOR),
pll->base + PLL_NUMERATOR);
val |= CLKMUX_BYPASS;
writel_relaxed(val, pll->base + PLL_CTRL);