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sh_eth: fix TRSCER mask for SH771x

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commit 8c91bc3d44 upstream.

According  to  the SH7710, SH7712, SH7713 Group User's Manual: Hardware,
Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named
differently), with all the other bits reserved. Apparently, this was not
the case with some early revisions of the manual as we have the other
bits declared (and set) in the original driver.  Follow the suit and add
the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x...

Fixes: 86a74ff21a ("net: sh_eth: add support for Renesas SuperH Ethernet")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sergey Shtylyov
2021-02-28 23:25:43 +03:00
committed by Greg Kroah-Hartman
parent 68277f69a8
commit 4ea3797335
1 changed files with 3 additions and 0 deletions
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3
drivers/net/ethernet/renesas/sh_eth.c
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@@ -1089,6 +1089,9 @@ static struct sh_eth_cpu_data sh771x_data = {
EESIPR_CEEFIP | EESIPR_CELFIP |
EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
EESIPR_PREIP | EESIPR_CERFIP,
.trscer_err_mask = DESC_I_RINT8,
.tsu = 1,
.dual_port = 1,
};