shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-10 04:48:04 +09:00
Code Issues Packages Projects Releases Wiki Activity

usb: dwc2: hcd: Fix channel halt for isoc and int transfer

Browse Source 
The parameters g_dma and g_dma_desc is used for gadget,
so let's use host_dma and dma_desc_enable instead of them.
And it needs to update the chan->halt_status for non-split
periodic channels rather than return immediately, otherwise,
the software will not release the channel when the channel
halt interrupt is triggered next time.

In addition, it only needs to wait for the core generates
a channel halted if halt_status is DWC2_HC_XFER_URB_DEQUEUE.

Fixes: a82c7abdf8 ("usb: dwc2: hcd: Fix host channel halt flow")
Change-Id: I455444af020ff751406295f21133ff6a950c04dd
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
This commit is contained in:
William Wu
2021-11-06 17:18:07 +08:00
parent effdc5032f
commit 4ee1573943
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/usb/dwc2/hcd.c
View File

@@ -1008,11 +1008,13 @@ void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
* uframe/frame (in the worst case), the core generates a channel
* halted and disables the channel automatically.
*/
if ((hsotg->params.g_dma && !hsotg->params.g_dma_desc) ||
if ((hsotg->params.host_dma && !hsotg->params.dma_desc_enable) ||
hsotg->hw_params.arch == GHWCFG2_EXT_DMA_ARCH) {
if (!chan->do_split &&
(chan->ep_type == USB_ENDPOINT_XFER_ISOC ||
chan->ep_type == USB_ENDPOINT_XFER_INT)) {
chan->ep_type == USB_ENDPOINT_XFER_INT) &&
(halt_status == DWC2_HC_XFER_URB_DEQUEUE)) {
chan->halt_status = halt_status;
dev_err(hsotg->dev, "%s() Channel can't be halted\n",
__func__);
return;