mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-06 10:58:48 +09:00
ODROID-XU4: drivers/fbtft: Add fb_hktft32 module for Hardkernel 3.2 inch TFT LCD
No longer use flexfb, fbtft_device that is deprecated since kernel 5.4. Signed-off-by: Yang Deokgyu <secugyu@gmail.com> Change-Id: Iebd014360f90eab5210722102d54c6169be5e28e
This commit is contained in:
committed by
Mauro (mdrjr) Ribeiro
parent
f0299b4320
commit
4f04a59a64
@@ -214,3 +214,10 @@ config FB_TFT_HKTFT35
|
||||
help
|
||||
Generic Framebuffer support for the Hardkernel 3.5 inch TFT LCD
|
||||
that uses the ILI9488 LCD Controller
|
||||
|
||||
config FB_TFT_HKTFT32
|
||||
tristate "FB driver for the Hardkernel 3.2 inch TFT LCD"
|
||||
depends on FB_TFT
|
||||
help
|
||||
Generic Framebuffer support for the Hardkernel 3.2 inch TFT LCD
|
||||
that uses the ILI9340 LCD Controller
|
||||
|
||||
@@ -38,3 +38,4 @@ obj-$(CONFIG_FB_TFT_UC1701) += fb_uc1701.o
|
||||
obj-$(CONFIG_FB_TFT_UPD161704) += fb_upd161704.o
|
||||
obj-$(CONFIG_FB_TFT_WATTEROTT) += fb_watterott.o
|
||||
obj-$(CONFIG_FB_TFT_HKTFT35) += fb_hktft35.o
|
||||
obj-$(CONFIG_FB_TFT_HKTFT32) += fb_hktft32.o
|
||||
|
||||
156
drivers/staging/fbtft/fb_hktft32.c
Normal file
156
drivers/staging/fbtft/fb_hktft32.c
Normal file
@@ -0,0 +1,156 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* FB driver for the Hardkernel 3.2 inch TFT LCD
|
||||
* that uses the ILI9340 LCD Controller
|
||||
*
|
||||
* Copyright (C) 2019 Yang Deokgyu
|
||||
*
|
||||
* Based on fb_ili9340.c by Noralf Tronnes
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/delay.h>
|
||||
#include <video/mipi_display.h>
|
||||
|
||||
#include "fbtft.h"
|
||||
|
||||
#define DRVNAME "fb_hktft32"
|
||||
#define WIDTH 240
|
||||
#define HEIGHT 320
|
||||
|
||||
/* Init sequence taken from: Arduino Library for the Adafruit 2.2" display */
|
||||
static int init_display(struct fbtft_par *par)
|
||||
{
|
||||
par->fbtftops.reset(par);
|
||||
|
||||
write_reg(par, 0xEF, 0x03, 0x80, 0x02);
|
||||
write_reg(par, 0xCF, 0x00, 0XC1, 0X30);
|
||||
write_reg(par, 0xED, 0x64, 0x03, 0X12, 0X81);
|
||||
write_reg(par, 0xE8, 0x85, 0x00, 0x78);
|
||||
write_reg(par, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02);
|
||||
write_reg(par, 0xF7, 0x20);
|
||||
write_reg(par, 0xEA, 0x00, 0x00);
|
||||
|
||||
/* Power Control 1 */
|
||||
write_reg(par, 0xC0, 0x23);
|
||||
|
||||
/* Power Control 2 */
|
||||
write_reg(par, 0xC1, 0x10);
|
||||
|
||||
/* VCOM Control 1 */
|
||||
write_reg(par, 0xC5, 0x3e, 0x28);
|
||||
|
||||
/* VCOM Control 2 */
|
||||
write_reg(par, 0xC7, 0x86);
|
||||
|
||||
/* COLMOD: Pixel Format Set */
|
||||
/* 16 bits/pixel */
|
||||
write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
|
||||
|
||||
/* Frame Rate Control */
|
||||
/* Division ratio = fosc, Frame Rate = 79Hz */
|
||||
write_reg(par, 0xB1, 0x00, 0x18);
|
||||
|
||||
/* Display Function Control */
|
||||
write_reg(par, 0xB6, 0x08, 0x82, 0x27);
|
||||
|
||||
/* Gamma Function Disable */
|
||||
write_reg(par, 0xF2, 0x00);
|
||||
|
||||
/* Gamma curve selection */
|
||||
write_reg(par, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
|
||||
|
||||
/* Positive Gamma Correction */
|
||||
write_reg(par, 0xE0,
|
||||
0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, 0xF1,
|
||||
0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00);
|
||||
|
||||
/* Negative Gamma Correction */
|
||||
write_reg(par, 0xE1,
|
||||
0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1,
|
||||
0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F);
|
||||
|
||||
write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
|
||||
|
||||
mdelay(120);
|
||||
|
||||
write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
|
||||
{
|
||||
write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
|
||||
xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
|
||||
|
||||
write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
|
||||
ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
|
||||
|
||||
write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
|
||||
}
|
||||
|
||||
#define ILI9340_MADCTL_MV 0x20
|
||||
#define ILI9340_MADCTL_MX 0x40
|
||||
#define ILI9340_MADCTL_MY 0x80
|
||||
static int set_var(struct fbtft_par *par)
|
||||
{
|
||||
u8 val;
|
||||
|
||||
switch (par->info->var.rotate) {
|
||||
case 270:
|
||||
val = ILI9340_MADCTL_MV;
|
||||
break;
|
||||
case 180:
|
||||
val = ILI9340_MADCTL_MY;
|
||||
break;
|
||||
case 90:
|
||||
val = ILI9340_MADCTL_MV | ILI9340_MADCTL_MY | ILI9340_MADCTL_MX;
|
||||
break;
|
||||
default:
|
||||
val = ILI9340_MADCTL_MX;
|
||||
break;
|
||||
}
|
||||
/* Memory Access Control */
|
||||
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, val | (par->bgr << 3));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void reset(struct fbtft_par *par)
|
||||
{
|
||||
if (!par->gpio.reset)
|
||||
return;
|
||||
fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__);
|
||||
gpiod_set_value_cansleep(par->gpio.reset, 0);
|
||||
usleep_range(20, 40);
|
||||
gpiod_set_value_cansleep(par->gpio.reset, 1);
|
||||
msleep(120);
|
||||
}
|
||||
|
||||
static struct fbtft_display display = {
|
||||
.regwidth = 8,
|
||||
.buswidth = 8,
|
||||
.width = WIDTH,
|
||||
.height = HEIGHT,
|
||||
.fbtftops = {
|
||||
.init_display = init_display,
|
||||
.set_addr_win = set_addr_win,
|
||||
.set_var = set_var,
|
||||
.reset = reset,
|
||||
},
|
||||
};
|
||||
|
||||
FBTFT_REGISTER_DRIVER(DRVNAME, "odroid,hktft32", &display);
|
||||
|
||||
MODULE_ALIAS("spi:" DRVNAME);
|
||||
MODULE_ALIAS("platform:" DRVNAME);
|
||||
MODULE_ALIAS("spi:hktft32");
|
||||
MODULE_ALIAS("platform:hktft32");
|
||||
|
||||
MODULE_DESCRIPTION("FB driver for the Hardkernel 3.2 inch TFT LCD uses the ILI9340 LCD Controller");
|
||||
MODULE_AUTHOR("Yang Deokgyu");
|
||||
MODULE_LICENSE("GPL");
|
||||
Reference in New Issue
Block a user