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i2s dts update

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qjb
2014-03-19 16:52:59 +08:00
parent 05a3296e5d
commit 4f14b281b4
1 changed files with 16 additions and 15 deletions
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31
arch/arm/boot/dts/rk3288.dtsi
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@@ -629,30 +629,31 @@
compatible = "rockchip-i2s";
reg = <0xff890000 0x10000>;
i2s-id = <0>;
// clocks = <&clk_i2s>;
// clock-names = "i2s_clk","i2s_mclk";
clocks = <&clk_i2s>, <&clk_i2s_out>;
clock-names = "i2s_clk","i2s_mclk";
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
// dmas = <&pdma0 0>,
// <&pdma0 1>;
dmas = <&pdma0 0>,
<&pdma0 1>;
//#dma-cells = <2>;
// dma-names = "tx", "rx";
// pinctrl-names = "default", "sleep";
// pinctrl-0 = <&i2s0_mclk &i2s0_sclk &i2s0_lrckrx &i2s0_lrcktx &i2s0_sdi &i2s0_sdo0 &i2s0_sdo1 &i2s0_sdo2 &i2s0_sdo3>;
// pinctrl-1 = <&i2s0_gpio>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2s_mclk &i2s_sclk &i2s_lrckrx &i2s_lrcktx &i2s_sdi &i2s_sdo0 &i2s_sdo1 &i2s_sdo2 &i2s_sdo3>;
pinctrl-1 = <&i2s_gpio>;
};
spdif: rockchip-spdif@0xff8b0000 {
compatible = "rockchip-spdif";
reg = <0xff8b0000 0x10000>; //8channel
//reg = <ff880000 0x2000>;//2channel
// clocks = <&clk_spdif>;
// clock-names = "spdif_mclk";
//reg = <ff880000 0x10000>;//2channel
clocks = <&clk_spdif>;
clock-names = "spdif_mclk";
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
// dmas = <&pdma0 8>;
dmas = <&pdma0 3>;
//dmas = <&pdma0 2>; //2channel
//#dma-cells = <1>;
// dma-names = "tx";
// pinctrl-names = "default";
// pinctrl-0 = <&spdif_tx>;
dma-names = "tx";
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx>;
};
pwm0: pwm@ff680000 {