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arm64: dts: rockchip: rk3576: modify compatible and clock-names of rga_node

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Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: I3abad87dde92e05bf6d156f6b207b30e0ddd7a5a
This commit is contained in:
Yu Qiaowei
2024-03-19 17:52:35 +08:00
committed by 余乔伟
parent 6e39594c7b
commit 4f79b4e8d9
1 changed files with 4 additions and 4 deletions
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8
arch/arm64/boot/dts/rockchip/rk3576.dtsi
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@@ -2250,12 +2250,12 @@
};
rga2_core0: rga@27920000 {
compatible = "rockchip,rga2_core0";
compatible = "rockchip,rga2";
reg = <0x0 0x27920000 0x0 0x1000>;
interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "rga2_core0_irq";
clocks = <&cru ACLK_RGA2E_0>, <&cru HCLK_RGA2E_0>, <&cru CLK_CORE_RGA2E_0>;
clock-names = "aclk_rga2e_0", "hclk_rga2e_0", "clk_rga2e_0";
clock-names = "aclk_rga", "hclk_rga", "clk_rga";
power-domains = <&power RK3576_PD_VPU>;
iommus = <&rga2_core0_mmu>;
status = "disabled";
@@ -2274,12 +2274,12 @@
};
rga2_core1: rga@27930000 {
compatible = "rockchip,rga2_core1";
compatible = "rockchip,rga2";
reg = <0x0 0x27930000 0x0 0x1000>;
interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "rga2_core1_irq";
clocks = <&cru ACLK_RGA2E_1>, <&cru HCLK_RGA2E_1>, <&cru CLK_CORE_RGA2E_1>;
clock-names = "aclk_rga2e_1", "hclk_rga2e_1", "clk_rga2e_1";
clock-names = "aclk_rga", "hclk_rga", "clk_rga";
power-domains = <&power RK3576_PD_VPU>;
iommus = <&rga2_core1_mmu>;
status = "disabled";