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mx2_camera: fix pixel clock polarity configuration
commit 42cc37fe20 upstream.
When SOCAM_PCLK_SAMPLE_FALLING, just leave CSICR1_REDGE unset, otherwise we get
the inverted behaviour.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
2a71e215aa
commit
5047654339
@@ -791,8 +791,6 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd,
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if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
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csicr1 |= CSICR1_REDGE;
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if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
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csicr1 |= CSICR1_INV_PCLK;
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if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
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csicr1 |= CSICR1_SOF_POL;
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if (common_flags & SOCAM_HSYNC_ACTIVE_HIGH)
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