pcie: fix check linkup timeout bug when pcie resume.

PD#169779: pcie: fix check linkup timeout bug when pcie resume.

Change-Id: Ia648c63447f101b71ae84dd960c0f414b80cbd32
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
This commit is contained in:
Yue Wang
2018-07-09 12:48:05 +08:00
committed by Yixun Lan
parent 53a66f642c
commit 50dedb3321
3 changed files with 22 additions and 0 deletions

View File

@@ -554,8 +554,16 @@ static int amlogic_pcie_link_up(struct pcie_port *pp)
u32 speed_okay = 0;
u32 current_data_rate;
int cnt = 0;
u32 val = 0;
u32 linkup = 0;
struct amlogic_pcie *amlogic_pcie = to_amlogic_pcie(pp);
val = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1);
linkup = ((val & PCIE_PHY_DEBUG_R1_LINK_UP) &&
(!(val & PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING)));
if (linkup)
return linkup;
while (smlh_up == 0 || rdlh_up == 0
|| ltssm_up == 0 || speed_okay == 0) {
udelay(20);

View File

@@ -514,8 +514,16 @@ int amlogic_pcie_link_up(struct pcie_port *pp)
u32 speed_okay = 0;
u32 current_data_rate;
int cnt = 0;
u32 val = 0;
u32 linkup = 0;
struct amlogic_pcie *amlogic_pcie = to_amlogic_pcie(pp);
val = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1);
linkup = ((val & PCIE_PHY_DEBUG_R1_LINK_UP) &&
(!(val & PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING)));
if (linkup)
return linkup;
while (smlh_up == 0 || rdlh_up == 0
|| ltssm_up == 0 || speed_okay == 0) {
udelay(20);

View File

@@ -33,6 +33,12 @@
#define PCIE_CFG_STATUS12 0x30
#define PCIE_CFG_STATUS17 0x44
/* PCIe Port Logic registers */
#define PLR_OFFSET 0x700
#define PCIE_PHY_DEBUG_R1 (PLR_OFFSET + 0x2c)
#define PCIE_PHY_DEBUG_R1_LINK_UP (0x1 << 4)
#define PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING (0x1 << 29)
#define WAIT_LINKUP_TIMEOUT 2000
enum pcie_data_rate {