shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 11:26:02 +09:00
Code Issues Packages Projects Releases Wiki Activity

PCI: dw: rockchip: Disable RC's BAR into rk_pcie_host_config()

Browse Source 
To fix the unnecessary RC's bar allocation warning:

[    2.226288] pci 0000:00:00.0: BAR 0: no space for [mem size 0x40000000]
[    2.226305] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x40000000]
[    2.226317] pci 0000:00:00.0: BAR 1: no space for [mem size 0x40000000]
[    2.226327] pci 0000:00:00.0: BAR 1: failed to assign [mem size 0x40000000]

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I617cfa3408115d7c73190c6b9816d48ae82a37c8
This commit is contained in:
Shawn Lin
2024-10-31 15:02:36 +08:00
committed by Tao Huang
parent 6c008c1038
commit 50fa63ad68
1 changed files with 4 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/pci/controller/dwc/pcie-dw-rockchip.c
View File

@@ -628,10 +628,6 @@ static int rk_add_pcie_port(struct rk_pcie *rk_pcie, struct platform_device *pde
return ret;
}
/* Disable BAR0 BAR1 */
dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_0, 0x0);
dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_1, 0x0);
return 0;
}
@@ -1566,6 +1562,10 @@ static int rk_pcie_host_config(struct rk_pcie *rk_pcie)
rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_INTR_MASK_LEGACY,
rk_pcie->intx | 0xffff0000);
/* Disable BAR0 BAR1 */
dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_0, 0x0);
dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_1, 0x0);
return 0;
}
@@ -1993,10 +1993,6 @@ static int __maybe_unused rockchip_dw_pcie_resume(struct device *dev)
goto unconfig_host;
}
/* Disable BAR0 BAR1 */
dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_0, 0x0);
dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_1, 0x0);
dw_pcie_dbi_ro_wr_dis(pci);
rk_pcie->in_suspend = false;
if (rk_pcie->skip_scan_in_resume)