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arm64: add sysfs vulnerability show for meltdown
[ Upstream commit 1b3ccf4be0 ]
We implement page table isolation as a mitigation for meltdown.
Report this to userspace via sysfs.
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
047aac35fd
commit
512158d0c6
@@ -889,7 +889,7 @@ static bool has_cache_dic(const struct arm64_cpu_capabilities *entry,
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return ctr & BIT(CTR_DIC_SHIFT);
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}
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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static bool __meltdown_safe = true;
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static int __kpti_forced; /* 0: not forced, >0: forced on, <0: forced off */
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static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
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@@ -908,6 +908,16 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
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{ /* sentinel */ }
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};
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char const *str = "command line option";
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bool meltdown_safe;
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meltdown_safe = is_midr_in_range_list(read_cpuid_id(), kpti_safe_list);
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/* Defer to CPU feature registers */
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if (has_cpuid_feature(entry, scope))
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meltdown_safe = true;
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if (!meltdown_safe)
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__meltdown_safe = false;
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/*
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* For reasons that aren't entirely clear, enabling KPTI on Cavium
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@@ -919,6 +929,19 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
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__kpti_forced = -1;
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}
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/* Useful for KASLR robustness */
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if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0) {
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if (!__kpti_forced) {
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str = "KASLR";
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__kpti_forced = 1;
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}
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}
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if (!IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0)) {
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pr_info_once("kernel page table isolation disabled by kernel configuration\n");
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return false;
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}
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/* Forced? */
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if (__kpti_forced) {
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pr_info_once("kernel page table isolation forced %s by %s\n",
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@@ -926,18 +949,10 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
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return __kpti_forced > 0;
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}
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/* Useful for KASLR robustness */
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if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))
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return true;
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/* Don't force KPTI for CPUs that are not vulnerable */
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if (is_midr_in_range_list(read_cpuid_id(), kpti_safe_list))
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return false;
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/* Defer to CPU feature registers */
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return !has_cpuid_feature(entry, scope);
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return !meltdown_safe;
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}
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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static void
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kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused)
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{
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@@ -962,6 +977,12 @@ kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused)
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return;
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}
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#else
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static void
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kpti_install_ng_mappings(const struct arm64_cpu_capabilities *__unused)
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{
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}
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#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
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static int __init parse_kpti(char *str)
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{
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@@ -975,7 +996,6 @@ static int __init parse_kpti(char *str)
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return 0;
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}
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early_param("kpti", parse_kpti);
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#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
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#ifdef CONFIG_ARM64_HW_AFDBM
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static inline void __cpu_enable_hw_dbm(void)
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@@ -1196,7 +1216,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
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.field_pos = ID_AA64PFR0_EL0_SHIFT,
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.min_field_value = ID_AA64PFR0_EL0_32BIT_64BIT,
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},
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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{
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.desc = "Kernel page table isolation (KPTI)",
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.capability = ARM64_UNMAP_KERNEL_AT_EL0,
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@@ -1212,7 +1231,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
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.matches = unmap_kernel_at_el0,
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.cpu_enable = kpti_install_ng_mappings,
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},
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#endif
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{
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/* FP/SIMD is not implemented */
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.capability = ARM64_HAS_NO_FPSIMD,
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@@ -1853,3 +1871,15 @@ void cpu_clear_disr(const struct arm64_cpu_capabilities *__unused)
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/* Firmware may have left a deferred SError in this register. */
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write_sysreg_s(0, SYS_DISR_EL1);
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}
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ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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if (__meltdown_safe)
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return sprintf(buf, "Not affected\n");
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if (arm64_kernel_unmapped_at_el0())
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return sprintf(buf, "Mitigation: PTI\n");
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return sprintf(buf, "Vulnerable\n");
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}
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