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https://github.com/hardkernel/linux.git
synced 2026-06-10 12:57:06 +09:00
add lcd_hj050na_06a lcd driver
This commit is contained in:
hhb
@@ -68,7 +68,9 @@ config LCD_A050VL01
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bool "RGB A050VL01"
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config LCD_B101EW05
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bool "RGB lcd panel B101EW05"
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config LCD_HJ050NA_06A
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bool "RGB lcd panel HJ050NA-06A"
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config LCD_HDMI_1280x800
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depends on MFD_RK610
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bool "RGB Hannstar LCD_HDMI_1280X800"
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@@ -38,3 +38,4 @@ obj-$(CONFIG_LCD_TX23D88VM) += lcd_tx23d88vm.o
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obj-$(CONFIG_LCD_AT070TN93) += lcd_at070tn93.o
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obj-$(CONFIG_LCD_A050VL01) += lcd_A050VL01.o
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obj-$(CONFIG_LCD_B101EW05) += lcd_b101ew05.o
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obj-$(CONFIG_LCD_HJ050NA_06A) += lcd_hj050na_06a.o
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395
drivers/video/display/screen/lcd_hj050na_06a.c
Normal file
395
drivers/video/display/screen/lcd_hj050na_06a.c
Normal file
@@ -0,0 +1,395 @@
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/*
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* Copyright (C) 2012 ROCKCHIP, Inc.
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*
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* author: hhb@rock-chips.com
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* creat date: 2012-04-19
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* route:drivers/video/display/screen/lcd_hj050na_06a.c
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/fb.h>
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#include <linux/delay.h>
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#include <linux/rk_fb.h>
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#include <mach/gpio.h>
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#include <mach/iomux.h>
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#include <mach/board.h>
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#include<linux/rk_screen.h>
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/* Base */
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#define OUT_TYPE SCREEN_RGB
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#define OUT_FACE OUT_P888
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#define OUT_CLK 50000000 //50MHz
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#define LCDC_ACLK 300000000 //29 lcdc axi DMA
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/* Timing */
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#define H_PW 5
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#define H_BP 50
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#define H_VD 640
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#define H_FP 130
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#define V_PW 3
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#define V_BP 23
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#define V_VD 960
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#define V_FP 12
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#define LCD_WIDTH 71 //uint mm the lenth of lcd active area
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#define LCD_HEIGHT 106
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/* Other */
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#define DCLK_POL 0
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#define SWAP_RB 0
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#define CONFIG_DEEP_STANDBY_MODE 0
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/* define spi write command and data interface function */
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#define SIMULATION_SPI 1
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#ifdef SIMULATION_SPI
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#define TXD_PORT gLcd_info->txd_pin
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#define CLK_PORT gLcd_info->clk_pin
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#define CS_PORT gLcd_info->cs_pin
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#define LCD_RST_PORT gLcd_info->reset_pin
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#define CS_OUT() gpio_direction_output(CS_PORT, 0)
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#define CS_SET() gpio_set_value(CS_PORT, GPIO_HIGH)
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#define CS_CLR() gpio_set_value(CS_PORT, GPIO_LOW)
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#define CLK_OUT() gpio_direction_output(CLK_PORT, 0)
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#define CLK_SET() gpio_set_value(CLK_PORT, GPIO_HIGH)
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#define CLK_CLR() gpio_set_value(CLK_PORT, GPIO_LOW)
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#define TXD_OUT() gpio_direction_output(TXD_PORT, 0)
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#define TXD_SET() gpio_set_value(TXD_PORT, GPIO_HIGH)
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#define TXD_CLR() gpio_set_value(TXD_PORT, GPIO_LOW)
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#define LCD_RST_OUT() gpio_direction_output(LCD_RST_PORT, 0)
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#define LCD_RST(i) gpio_set_value(LCD_RST_PORT, i)
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#define bits_9
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#ifdef bits_9 //9bits
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#define Write_ADDR(cmd) spi_write_9bit(0, cmd)
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#define Write_DATA(dat) spi_write_9bit(1, dat)
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#else //16bits
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#define Write_ADDR(cmd) spi_write_16bit(0, cmd)
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#define Write_DATA(dat) spi_write_16bit(1, dat)
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#endif
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#define Lcd_EnvidOnOff(i)
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#else
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#define bits_9 1
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#ifdef bits_9 //9bits
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#define LCDSPI_InitCMD(cmd)
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#define LCDSPI_InitDAT(dat)
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#else //16bits
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#define LCDSPI_InitCMD(cmd)
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#define LCDSPI_InitDAT(dat)
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#endif
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#endif
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#define DRVDelayUs(i) udelay(i)
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static struct rk29lcd_info *gLcd_info = NULL;
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int lcd_init(void);
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int lcd_standby(u8 enable);
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/* spi write a data frame,type mean command or data */
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int spi_write_9bit(u32 type, u32 value)
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{
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u32 i = 0;
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if(type != 0 && type != 1)
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return -1;
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/*make a data frame of 9 bits,the 8th bit 0:mean command,1:mean data*/
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value &= 0xff;
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value |= (type << 8);
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CS_CLR();
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DRVDelayUs(2);
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for(i = 0; i < 9; i++) //reg
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{
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CLK_CLR();
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if(value & (1 << (8-i)))
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TXD_SET();
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else
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TXD_CLR();
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DRVDelayUs(2);
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CLK_SET();
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DRVDelayUs(2);
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}
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CS_SET();
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TXD_SET();
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return 0;
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}
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int lcd_init(void)
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{
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if(gLcd_info)
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gLcd_info->io_init();
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printk("lcd hj050a_06a...\n");
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if(LCD_RST_PORT){
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if (gpio_request(LCD_RST_PORT, NULL) != 0) {
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gpio_free(LCD_RST_PORT);
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printk("%s: request LCD_RST_PORT error\n", __func__);
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} else {
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gpio_direction_output(LCD_RST_PORT, 0);
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usleep_range(2*1000, 3*1000);
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gpio_set_value(LCD_RST_PORT, 1);
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usleep_range(6*1000, 7*1000);
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}
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}
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Write_ADDR(0x0001); // Software Reset
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mdelay(10);
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Write_ADDR(0x0011); // Sleep Out
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mdelay(200);
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//<<<<<<<<<<<<<<<MANUFACTURE COMMAND ACCESS PROTECT>>>>>>>>>>>>>>>
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Write_ADDR(0x00B0); //Manufacture Command Access Protect
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Write_DATA(0x0004);
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//<<<<<<<<<<<<Source Output Number>>>>>>>>>>>>>
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Write_ADDR(0x00B3); //Number of Source outputs & Pixel Format setting
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Write_DATA(0x0000); //PSEL[2:0] = 640 RGB
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//<<<<<<<<<<<<DSI Control>>>>>>>>>>>>>>>>>
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Write_ADDR(0x00B6);
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Write_DATA(0x0052);
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Write_DATA(0x0083);
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Write_DATA(0x0045);
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Write_DATA(0x0000);
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//<<<<<<<<<<<<PANEL DRIVING SETTING>>>>>>>>>>>>
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Write_ADDR(0x00C0); //PANEL DRIVING SETTING 1 (36h=00)
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Write_DATA(0x000B); //BLREV[5:4];REV[3];UD[2]=0:forward;BGR[1]=1:RGB->BGR;SS=1:S1920->S1
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Write_DATA(0x00BF); //NL[7:0] NL = 3BF : 960 Line
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Write_DATA(0x0003); //NL[10:8]
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Write_DATA(0x0011); //VBP[5:0] Vertical back porch
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Write_DATA(0x0002); //DIV[3:0]
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Write_DATA(0x0009); //PCDIVL[4:0] PCLKD Low Period
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Write_DATA(0x0009); //PCDIVH[4:0] PCLKD High Period
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Write_ADDR(0x00C1); //PANEL DRIVING SETTING 2
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Write_DATA(0x0000); //GDS_MODE = 0 : GIP Ctrl(single scan)
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Write_DATA(0x0050); //LINEINV[6:4]:2 Line inversion; MFPOL[1]:No Phase inversion; PNSER[0]:Spatial mode1
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Write_DATA(0x0003); //SEQMODE[7]:Source Pre-charge Mode; SEQGND[3:0]: GND Pre-charge 3clk
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Write_DATA(0x0022); //SEQVN[7:4]:VCL pre-charge 2clk ;SEQVP[3:0]:VCL pre-charge 2clk
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Write_DATA(0x0012); //DPM[7:6]: ;GEQ2W[5:3]/GEQ1W[2:0]:Gate pre-charge
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Write_DATA(0x0008); //SDT[5:0] = 8 : Source output delay
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Write_DATA(0x0060); //PSEUDO_EN = 0;
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Write_DATA(0x0001); //GEM
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Write_ADDR(0x00C3); //PANEL DRIVING SETTING 4
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Write_DATA(0x0000); //GIPPAT[6:4]:Pattern-1 ; GIPMOD[2:0]: GIP mode 1
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Write_DATA(0x0000); //STPEOFF:normal ; FWBWOFF:normal ; T_GALH:normal
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Write_DATA(0x0021); //GSPF[5:0]: 33clk
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Write_DATA(0x0021); //GSPS[5:0]: 33clk
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Write_DATA(0x0000); //VFSTEN[7]: NO END Pulse ; VFST[4:0]: 0 line
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Write_DATA(0x0060); //FL1[6]: ; GLOL[5:4]: ; VGSET[3]: ; GIPSIDE=0:Single drive mode ; GOVERSEL=0:Overlap ; GIPSEL=0:8-phase clk
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Write_DATA(0x0003); //VBPEX[6]: ; STVG[5:3]: ; STVGA[2:0]:
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Write_DATA(0x0000); //ACBF[7:6]: ; ACF[5:4]: ; ACBR[3:2]: ; ACR[1:0]:
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Write_DATA(0x0000); //ACBF2[7:6]: ; ACF2[5:4]: ; ACBR2[3:2]: ; ACR2[1:0]:
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Write_DATA(0x0090); //9xH ACCYC[3:2]: ; ACFIX[1;0]:
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Write_DATA(0x001D); //GOFF_L[7:0]
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Write_DATA(0x00FE); //GOFF_L[15:8]
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Write_DATA(0x0003); //GOFF_L[17:16]
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Write_DATA(0x001D); //GOFF_R[7:0]
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Write_DATA(0x00FE); //GOFF_R[15:8]
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Write_DATA(0x0003); //GOFF_R[17:16]
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//<<<<<<<<<<Gamma Setting>>>>>>>>>>
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Write_ADDR(0x00C8); //Gamma Setting
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Write_DATA(0x0000);
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Write_DATA(0x0008);
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Write_DATA(0x0010);
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Write_DATA(0x001A);
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Write_DATA(0x0023);
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Write_DATA(0x0026);
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Write_DATA(0x0026);
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Write_DATA(0x0023);
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Write_DATA(0x001A);
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Write_DATA(0x0012);
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Write_DATA(0x000C);
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Write_DATA(0x0006);
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Write_DATA(0x0000);
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Write_DATA(0x0008);
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Write_DATA(0x0010);
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Write_DATA(0x001A);
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Write_DATA(0x0023);
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Write_DATA(0x0026);
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Write_DATA(0x0026);
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Write_DATA(0x0023);
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Write_DATA(0x001A);
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Write_DATA(0x0012);
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Write_DATA(0x000C);
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Write_DATA(0x0006);
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//<<<<<<<<<<<TIG Mode Setting>>>>>>>>>>>
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Write_ADDR(0x00CA); //TIG Mode Setting
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Write_DATA(0x00FF); //P1:
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Write_DATA(0x0007); //P2:
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//<<<<<<<<<<<<<<<<<<<<POWER SETTING>>>>>>>>>>>>>>>>>>>
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Write_ADDR(0x00D0); //POWER SETTING(CHARGE PUMP)
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Write_DATA(0x0074); //P1:VC1 = 7; DC23 = 4
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Write_DATA(0x0029); //P2:BT3 = 2; BT2 = 1
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Write_DATA(0x00FF); //P3:VLMT1M = D; VLMT1 = D
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Write_DATA(0x00BB); //P4:VC3 = B; VC2 =B
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Write_DATA(0x0010); //P5:VLMT2B = 0; VLMT2 = 0A
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Write_DATA(0x002F); //P6:VLMT3B = 0; VLMT3 = 0F
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Write_DATA(0x0000); //P7:VBSON = 0; VBS = 00
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Write_DATA(0x00C0); //P8:VGGON = 0; LVGLON = 0; VC6 = 0
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Write_DATA(0x00CC); //P9:DC56 = ?
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Write_ADDR(0x00D1); //POWER SETTING(SWITCHING REGULATOR)
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Write_DATA(0x004D); //P1:VDF1 = 4; VDF0 = D
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Write_DATA(0x0024); //P2:DC1CLKEN = 0; DC1MCLKEN = 0; VDF2 =4
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Write_DATA(0x0034); //P3:VDWS2 = 3; VDWS1 = 4
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Write_DATA(0x0055); //P4:VDW12 = 5; VDW11 = 5
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Write_DATA(0x0055); //P5:VDW14 = 5; VDW13 = 5
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Write_DATA(0x0077); //P6:VDW22 = 7; VDW21 = 7
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Write_DATA(0x0077); //P7:VDW24 = 7; VDW23 = 7
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Write_DATA(0x0006); //P8:LSWPH = 6
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//<<<<<<<<<<<<<<<VPLVL/VNLVL SETTING>>>>>>>>>>>>>>>
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Write_ADDR(0x00D5); //VPLVL/VNLVL SETTING
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Write_DATA(0x002A); //P1:PVH = 24
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Write_DATA(0x002A); //P2:NVH = 24
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//<<<<<<<<<<<<<<<DSI Setting>>>>>>>>>>>>>>>>
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Write_ADDR(0x00D6);
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Write_DATA(0x00A8);
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//<<<<<<<<<<<<<<<VCOMDC SETTING>>>>>>>>>>>>>>>
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Write_ADDR(0x00DE); //VCOMDC SETTING
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Write_DATA(0x0003); //P1:WCVDCB.[1] = 1; WCVDCF.[0] = 1
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Write_DATA(0x0090);
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Write_DATA(0x0090);
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//<<<<<<<<<<<<<<<MANUFACTURE COMMAND ACCESS PROTECT>>>>>>>>>>>>>>>
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Write_ADDR(0x00B0); //MANUFACTURE COMMAND ACCESS PROTECT
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Write_DATA(0x0003); //
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mdelay(50);
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Write_ADDR(0x0036); //
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Write_DATA(0x0000); //
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mdelay(20);
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Write_ADDR(0x003A); //Set Pixel_Format
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Write_DATA(0x0077); //
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mdelay(20);
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Write_ADDR(0x0029); // Display On
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if(gLcd_info)
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gLcd_info->io_deinit();
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return 0;
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}
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int lcd_standby(u8 enable)
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{
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if(gLcd_info)
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gLcd_info->io_init();
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if(enable) {
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Write_ADDR(0x0028); //set Display Off
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Write_ADDR(0x0010); //enter sleep mode
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msleep(100); //wait at least 3 frames time
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#if CONFIG_DEEP_STANDBY_MODE
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Write_ADDR(0x00b0);
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Write_DATA(0x0004);
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Write_ADDR(0x00b1);
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Write_DATA(0x0001);
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msleep(2); //wait at least 1ms
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#endif
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} else {
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#if CONFIG_DEEP_STANDBY_MODE
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gpio_direction_output(LCD_RST_PORT, 0);
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usleep_range(2*1000, 3*1000);
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gpio_set_value(LCD_RST_PORT, 1);
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usleep_range(6*1000, 7*1000);
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#endif
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Write_ADDR(0x0011); //exit sleep mode
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msleep(100);
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Write_ADDR(0x0036); // set display on
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Write_DATA(0x0000);
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mdelay(20);
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Write_ADDR(0x003A);
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Write_DATA(0x0077);
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mdelay(20);
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Write_ADDR(0x0029);
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}
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if(gLcd_info)
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gLcd_info->io_deinit();
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return 0;
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}
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void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
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{
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/* screen type & face */
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screen->type = OUT_TYPE;
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screen->face = OUT_FACE;
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/* Screen size */
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screen->x_res = H_VD;
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screen->y_res = V_VD;
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screen->width = LCD_WIDTH;
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screen->height = LCD_HEIGHT;
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/* Timing */
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screen->lcdc_aclk = LCDC_ACLK;
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screen->pixclock = OUT_CLK;
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screen->left_margin = H_BP;
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screen->right_margin = H_FP;
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screen->hsync_len = H_PW;
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screen->upper_margin = V_BP;
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screen->lower_margin = V_FP;
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screen->vsync_len = V_PW;
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/* Pin polarity */
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screen->pin_hsync = 0;
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screen->pin_vsync = 0;
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screen->pin_den = 0;
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screen->pin_dclk = DCLK_POL;
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/* Swap rule */
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screen->swap_rb = SWAP_RB;
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screen->swap_rg = 0;
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screen->swap_gb = 0;
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screen->swap_delta = 0;
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screen->swap_dumy = 0;
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/* Operation function*/
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screen->init = lcd_init;
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screen->standby = lcd_standby;
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if(gLcd_info)
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gLcd_info = lcd_info;
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}
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