hdmi: cec: switch hdmi port cec not work

PD#171014: cec: hdmi source cec not work

Change-Id: I2198eb4f9bc17f9909b9d693b4f12945240a7239
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
This commit is contained in:
Yong Qin
2018-08-13 19:48:58 +08:00
committed by Jianxin Pan
parent a99994c0b1
commit 536d2fb891
6 changed files with 20 additions and 11 deletions

View File

@@ -158,8 +158,6 @@ static bool ee_cec;
static bool pin_status;
static unsigned int cec_msg_dbg_en;
static void cec_hw_reset(void);
#define CEC_ERR(format, args...) \
{if (cec_dev->dbg_dev) \
dev_err(cec_dev->dbg_dev, format, ##args); \
@@ -730,6 +728,8 @@ void cec_logicaddr_set(int l_add)
hdmirx_cec_write(DWC_CEC_ADDR_L, 1 << l_add);
else
hdmirx_cec_write(DWC_CEC_ADDR_H, 1 << (l_add - 8)|0x80);
CEC_INFO("set cecb logical addr:0x%x\n", l_add);
return;
}
aocec_wr_reg(CEC_LOGICAL_ADDR0, 0);
@@ -738,11 +738,11 @@ void cec_logicaddr_set(int l_add)
udelay(100);
aocec_wr_reg(CEC_LOGICAL_ADDR0, (0x1 << 4) | (l_add & 0xf));
if (cec_msg_dbg_en)
CEC_INFO("set logical addr:0x%x\n",
CEC_INFO("set cec alogical addr:0x%x\n",
aocec_rd_reg(CEC_LOGICAL_ADDR0));
}
static void cec_hw_reset(void)
void cec_hw_reset(void)
{
if (ee_cec) {
cecrx_hw_init();
@@ -817,6 +817,8 @@ static bool need_nack_repeat_msg(const unsigned char *msg, int len, int t)
static void cec_clear_logical_addr(void)
{
CEC_INFO("clear logical addr\n");
if (ee_cec) {
hdmirx_cec_write(DWC_CEC_ADDR_L, 0);
hdmirx_cec_write(DWC_CEC_ADDR_H, 0x80);
@@ -2152,6 +2154,8 @@ static ssize_t dbg_store(struct class *cla, struct class_attribute *attr,
writel(val, cec_dev->cec_reg + addr);
CEC_ERR("wao addr:0x%x, val:0x%x", val, addr);
} else if (token && strncmp(token, "preinit", 7) == 0) {
cec_pre_init();
} else {
if (token)
CEC_ERR("no cmd:%s\n", token);
@@ -2351,7 +2355,7 @@ void cec_dump_info(void)
CEC_ERR("hal_flag:0x%x\n", cec_dev->hal_flag);
CEC_ERR("hpd_state:0x%x\n", cec_dev->tx_dev->hpd_state);
CEC_ERR("cec_config:0x%x\n", cec_config(0, 0));
CEC_ERR("log_addr:0x%x\n", cec_dev->cec_info.log_addr);
port = kcalloc(cec_dev->port_num, sizeof(*port), GFP_KERNEL);
if (port) {
init_cec_port_info(port, cec_dev);

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@@ -18,7 +18,7 @@
#ifndef __AO_CEC_H__
#define __AO_CEC_H__
#define CEC_DRIVER_VERSION "Ver 2018/08/10\n"
#define CEC_DRIVER_VERSION "Ver 2018/08/13\n"
#define CEC_FRAME_DELAY msecs_to_jiffies(400)
#define CEC_DEV_NAME "cec"
@@ -445,5 +445,6 @@ void aocec_irq_enable(bool enable);
extern void dump_reg(void);
#endif
extern void cec_dump_info(void);
extern void cec_hw_reset(void);
#endif /* __AO_CEC_H__ */

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@@ -301,7 +301,7 @@ static void cec_arbit_bit_time_set(unsigned int bit_set,
}
}
static void cec_hw_reset(void)
static void ceca_hw_reset(void)
{
writel(0x1, cec_dev->cec_reg + AO_CEC_GEN_CNTL);
/* Enable gated clock (Normal mode). */
@@ -414,7 +414,7 @@ static int cec_ll_trigle_tx(const unsigned char *msg, int len)
aocec_wr_reg(CEC_TX_MSG_CMD, TX_ABORT);
cec_timeout_cnt++;
if (cec_timeout_cnt > 0x08)
cec_hw_reset();
ceca_hw_reset();
break;
}
msleep(20);
@@ -457,7 +457,7 @@ static void tx_irq_handle(void)
if (cec_dev->cec_msg_dbg_en == 1)
CEC_ERR("TX ERROR!!!\n");
if (aocec_rd_reg(CEC_RX_MSG_STATUS) == RX_ERROR)
cec_hw_reset();
ceca_hw_reset();
else
aocec_wr_reg(CEC_TX_MSG_CMD, TX_NO_OP);
cec_dev->cec_tx_result = CEC_FAIL_NACK;
@@ -623,7 +623,7 @@ try_again:
/* timeout or interrupt */
if (ret == 0) {
CEC_ERR("tx timeout\n");
cec_hw_reset();
ceca_hw_reset();
}
ret = CEC_FAIL_OTHER;
} else {

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@@ -46,7 +46,7 @@
*
*
*/
#define RX_VER2 "ver.2018/08/07"
#define RX_VER2 "ver.2018/8/13"
/*print type*/
#define LOG_EN 0x01

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@@ -1861,6 +1861,8 @@ void hdmirx_hw_config(void)
hdmirx_phy_init();
hdmirx_wr_top(TOP_INTR_MASKN, top_intr_maskn_value);
rx_pr("%s %d Done!\n", __func__, rx.port);
if (rx.chip_id <= CHIP_ID_TXL)
cec_hw_reset();
}
/*

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@@ -1096,6 +1096,8 @@ extern int rx_set_port_hpd(uint8_t port_id, bool val);
extern void rx_set_cur_hpd(uint8_t val);
extern unsigned int rx_get_hdmi5v_sts(void);
extern unsigned int rx_get_hpd_sts(void);
extern void cec_hw_reset(void);
#endif