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clk: tl1: fix vpu_clkb_composite can not set to 500M [1/1]

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PD#SWPL-10083

Problem:
vpu_clkb_composite can not set to 500M

Solution:
using CLK_SET_RATE_PARENT to set up relationship
between vpu_clkb_composite and vpu_clkb_tmp_composite,
when change vpu_clkb_composite's rate, it may
change vpu_clkb_tmp_composite'rate to get the best
rate.

Verify:
verified on tl1 sktt

Change-Id: I9a08eab4dd6b2209e0b2589e72e79567589fb217
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
This commit is contained in:
Jian Hu
2019-06-20 12:48:37 +08:00
committed by Tao Zeng
parent c9712cddb1
commit 5390c07dce
1 changed files with 8 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/amlogic/clk/tl1/tl1_clk_media.c
View File

@@ -437,9 +437,16 @@ static struct meson_composite m_composite[] = {
&vpu_clkb_tmp_gate.hw, 0
},/*vpu_clkb_tmp*/
/*
* add CLK_SET_RATE_PARENT for vpu_clkb_composite clock
* vpu_clkb_composite's rate can set to 285714281HZ/400MHZ
* 500MHZ/667MHZ or less than them.
* No one use the vpu_clkb_tmp_composite, So we can change
* its rate to get the best rate for vpu_clkb_composite.
*/
{CLKID_VPU_CLKB_COMP, "vpu_clkb_composite",
vpu_clkb_nomux_parent_names, ARRAY_SIZE(vpu_clkb_nomux_parent_names),
NULL, &vpu_clkb_div.hw, &vpu_clkb_gate.hw, 0
NULL, &vpu_clkb_div.hw, &vpu_clkb_gate.hw, CLK_SET_RATE_PARENT
},/*vpu_clkb*/
{CLKID_VDIN_MEAS_COMP, "vdin_meas_composite",